SC16C650BIB48 NXP Semiconductors, SC16C650BIB48 Datasheet - Page 23

UART, 32BYTE FIFO, 16C650, LQFP48

SC16C650BIB48

Manufacturer Part Number
SC16C650BIB48
Description
UART, 32BYTE FIFO, 16C650, LQFP48
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC16C650BIB48

No. Of Channels
1
Data Rate
3Mbps
Supply Voltage Range
2.25V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LQFP
No. Of Pins
48
Svhc
No SVHC (18-Jun-2010)
Operating
RoHS Compliant
Uart Features
Automatic Software/Hardware Flow Control, Programmable Xon/Xoff Characters
Rohs Compliant
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SC16C650BIB48,151
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
SC16C650BIB48151
Manufacturer:
NXP Semiconductors
Quantity:
135
NXP Semiconductors
SC16C650B_4
Product data sheet
7.6 Modem Control Register (MCR)
Table 16.
Table 17.
Table 18.
This register controls the interface with the modem or a peripheral device.
Table 19.
LCR[5]
X
0
0
1
1
LCR[2]
0
1
1
LCR[1]
0
0
1
1
Bit
7
6
Symbol
MCR[7]
MCR[6]
LCR[5] parity selection
LCR[2] stop bit length
LCR[1:0] word length
Modem Control Register bits description
LCR[4]
X
0
1
0
1
Word length
5, 6, 7, 8
5
6, 7, 8
LCR[0]
0
1
0
1
Description
Clock select.
IR enable.
logic 0 = divide-by-1. The input clock (crystal or external) is divided by 16 and
then presented to the programmable Baud Rate Generator (BGR) without
further modification, i.e., divide-by-1 (normal default condition).
logic 1 = divide-by-4. The divide-by-1 clock described in MCR[7] equals a
logic 0, is further divided by four (see also
rate
logic 0 = enable the standard modem receive and transmit input/output
interface (normal default condition)
logic 1 = enable infrared IrDA receive and transmit inputs/outputs. While in this
mode, the TX/RX output/inputs are routed to the infrared encoder/decoder.
The data input and output levels will conform to the IrDA infrared interface
requirement. As such, while in this mode, the infrared TX output will be a
logic 0 during idle data conditions.
Rev. 04 — 14 September 2009
generator”).
LCR[3]
0
1
1
1
1
Word length
5
6
7
8
Stop bit length (bit times)
1
1-
2
1
2
UART with 32-byte FIFOs and IrDA encoder/decoder
Parity selection
no parity
odd parity
even parity
force parity ‘1’
forced parity ‘0’
Section 6.7 “Programmable baud
SC16C650B
© NXP B.V. 2009. All rights reserved.
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