M52S128168A-7.5TG ELITE SEMICONDUCTOR, M52S128168A-7.5TG Datasheet - Page 41

• Manufacturer Part Number: M52S128168A-7.5TG
• Description: IC, SDRAM, 128MBIT, 133MHZ, TSOP-54
• Manufacturer: ELITE SEMICONDUCTOR

Specifications of M52S128168A-7.5TG

• Memory Type: DRAM - Sychronous
• Memory Configuration: 2M X 16
• Ic Interface Type: Parallel
• Memory Case Style: TSOP
• No. Of Pins: 54
• Operating Temperature Range: 0°C To +70°C
• Frequency: 133MHz
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Page Size: 128MB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ESMT
Write interrupted by Precharge Command & Write Burst Stop Cycle @ Burst Length = Full page
*Note : 1. Data-in at the cycle of interrupted by precharge can not be written into the corresponding memory cell. It is defined by
Elite Semiconductor Memory Technology Inc.
2. Burst stop is valid at every burst length.
AC parameter of t
DQM at write interrupted by precharge command is needed to prevent invalid write.
DQM should mask invalid input data on precharge command cycle when asserting precharge before end of burst. Input
data after Row precharge cycle will be masked internally.
RDL
.
Publication Date: Oct. 2007
Revision: 1.1
M52S128168A
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