F49L160BA-70TG Elite Semiconductor Memory Technology Inc., F49L160BA-70TG Datasheet
F49L160BA-70TG
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F49L160BA-70TG Summary of contents
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... ORDERING INFORMATION Part No Boot Speed Package Comments F49L160UA-70TG Upper 70 ns F49L160BA-70TG Bottom GENERAL DESCRIPTION The F49L160UA/F49L160BA Megabit, 3V only CMOS Flash memory device organized as 2M bytes of 8 bits or 1M words of 16bits. This device is packaged in standard 48-pin TSOP designed to be programmed and erased both in system and can in standard EPROM programmers ...
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... Power Supply CC GND Ground NC No connection Elite Semiconductor Memory Technology Inc. F49L160UA/F49L160BA F49L160U/BA Functions To provide memory addresses. To output data when Read and receive data when Write. The outputs are in tri-state when high. To bi-direction date I/O when BYTE is High To input address when BYTE is Low To activate the device when CE is low ...
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... SA33 8Kbytes 4Kwords SA34 16Kbytes 8Kwords Note: Byte Mode: address range A19 : A-1, Word mode : address range A19 : A0 Elite Semiconductor Memory Technology Inc. F49L160UA/F49L160BA Address range Byte Mode(x8) Word Mode(x16) A19 A18 A17 A16 A15 A14 A13 A12 000000-00FFFF 00000-07FFF 010000-01FFFF 08000-0FFFF ...
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... ESMT Table 2: F49L160BA Sector Address Table Sector Size Sector Byte Mode Word Mode SA0 16Kbytes 8Kwords SA1 8Kbytes 4Kwords SA2 8Kbytes 4Kwords SA3 32Kbytes 16Kwords SA4 64Kbytes 32Kwords SA5 64Kbytes 32Kwords SA6 64Kbytes 32Kwords SA7 64Kbytes 32Kwords SA8 64Kbytes 32Kwords SA9 ...
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... FUNCTIONAL BLOCK DIAGRAM CONTROL O E INPUT WE LOGIC ADDRESS LATCH A0~A19 AND BUFFER DQ0~DQ14 DQ15 / A-1 Elite Semiconductor Memory Technology Inc. F49L160UA/F49L160BA PROGRAM / ERASE HIGH VOLTAGE F49L400U/BA FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM DATA SENSE HV AMPLIFIER PROGRAM DATA LATCH BUFFER Publication Date : Jan ...
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... This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The register is composed of latches that store the command, address and data information needed to execute the command. The contents of the Table 3. F49L160UA/F49L160BA Operation Modes Selection DESCRIPTION CE Reset(3) X Read ...
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... ESMT Table 4. F49L160UA/F49L160BA Auto-Select Mode (High Voltage Method) Description Mode OE CE Manufacturer ID: ESMT L L Device ID: Word L L F49L160UA (Upper Boot Byte L L Block) Device ID: Word L L F49L160BA (Bottom Byte L L Boot Block) Sector Protection L L Verification L= Logic Low Logic High=V IL Notes : 1 ...
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... BYTE = V and the pin of D15/A-1 is bi-direction Data I/O. However, BYTE = and The pin of DQ15/A-1 only address input pin. You must define the function of this pin before enable this device. F49L160UA/F49L160BA , and The “Program Command” control signals. Standard address or Vcc ± ...
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... Once V pin to V (10V-10.5V). the ID protected again. Start RESET = V (Note 1) ID Perform Erase or Program Operation Operation Completed RESET = Temporary Sector Unprotect Completed (Note 2) F49L160UA/F49L160BA pin, all the previously protected sectors are R ESET Publication Date : Jan. 2008 Revision: 1.8 is removed from ID 9/50 ...
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... R ESET ID All addresses are latched on the falling edge whichever happens later. All data is latched on the rising edge whichever happens first. Refer to the corresponding timing diagrams in the AC Characteristics section. F49L160UA/F49L160BA on address pin A9 and device to be programmed ( ...
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... Table 5. F49L160UA/F49L160BA Software Command Definitions Bus Command Cycles (1~3) Addr Reset (4) 1 XXXH Read ( Word 4 555H Program Byte 4 AAAH AAH Word 6 555H Chip Erase Byte 6 AAAH AAH Word 6 555H Sector Erase Byte 6 AAAH AAH Sector Erase 1 XXXH B0H Suspend (6) Sector Erase Resume ...
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... The fourth cycle of the auto-select command sequence is a read cycle. 2. For Sector Protect Verify operation: If read out data is 01H, it means the sector has been protected. If read out data is 00H, it means the sector is still not being protected. Elite Semiconductor Memory Technology Inc. Table 6. F49L160UA/F49L160BA Auto-Select Command 1st Bus 2nd Bus Cycle ...
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... Command” section. See also the “Read Mode” in the “Device Operations” section for more information. Refer to Figure 5 for the timing diagram. Elite Semiconductor Memory Technology Inc. F49L160UA/F49L160BA Program Command The program command sequence programs one byte into the device. Programming is a four-bus-cycle operation ...
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... DQ7–DQ0. The system can use DQ7, or DQ6 and DQ2 together, to determine if a sector is actively erasing or is erase-suspended. See “Write Operation Status” section for more information on these status bits. F49L160UA/F49L160BA Publication Date : Jan. 2008 Revision: 1.8 14/50 ...
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... BY is complete or in progress. Table 7. Write Operation Status Status (Note1) Reading Erase Suspended Sector Reading Non-Erase Suspended Sector Erase Suspend Program F49L160UA/F49L160BA on address bit A9 DQ7, and DQ6 each offer a method for DQ7 DQ5 DQ6 DQ3 (Note2) Toggle 0 ...
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... When the system detects DQ7 has changed from the complement to true data, it can read valid data at DQ7~ DQ0 on the following read cycles. This is because DQ7 may change asynchronously with DQ0–DQ6 while Elite Semiconductor Memory Technology Inc. F49L160UA/F49L160BA Output Enable ( asserted low. Refer to Figure 21, Data Polling ...
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... DQ3 prior to and following each subsequent sector erase command. If DQ3 is high on the second status check, the last command might not have been accepted. Table 7 shows the outputs for DQ3. F49L160UA/F49L160BA time-out condition occurs during Publication Date : Jan ...
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... Power-Up Write Inhibit device does not accept commands on the rising edge The internal state machine is automatically reset to reading array data on power-up. F49L160UA/F49L160BA initiate a write cycle and GND. CC ...
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... Typical timeout for full chip erase 2 0005h Max. timeout for byte/word write 2 0000h Max. timeout for buffer write 2 0004h Max. timeout per individual block erase 2 0000h Max. timeout per full chip erase 2 F49L160UA/F49L160BA Description Description pin present) PP pin present μs N μ ...
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... Not Supported Supported 0004h Sector Protect/Group Unprotect scheme Simultaneous Operation 0000h 00 = Not Supported Supported Burst Mode Type 0000h 00 = Not Supported Supported Page Mode Type 0000h 00 = Not Supported Word Page Word Page F49L160UA/F49L160BA Description N Description Publication Date : Jan. 2008 Revision: 1.8 20/50 ...
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... Exposure of the device to absolute maximum +0 rating conditions for extended periods may affect device reliability. +2.0 V for periods F49L160UA/F49L160BA is -0.5 V. During voltage transitions, A9 ESET may overshoot V to –2.0 V for periods R ESET Publication Date : Jan ...
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... ESET ± 0.3V ± 0. =3. 4.0mA min -2mA min -100uA, V min OH CC F49L160UA/F49L160BA Min. Typ. Max 2.7V to 3.6V CC Min. Typ. Max. ±1 35 max ± 100 25 100 25 100 -0.5 0.8 ...
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... < Elite Semiconductor Memory Technology Inc. Figure 3. Test Setup F49L160UA/F49L160BA Publication Date : Jan ...
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... IL Read Toggle and 10 Data Polling Figure 5. Read Timing Waveform F49L160UA/F49L160BA -70 -90 Max. Min. Max ...
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... See the "Erase and Programming Performance" section for more information. Elite Semiconductor Memory Technology Inc. Description Min ow Byte 9(typ.) Word 11(typ.) 0.7(typ F49L160UA/F49L160BA = 0C to 70C 2.7V~3.6V -70 -90 Unit Max. Min. Max 9(typ.) 11(typ.) 0.7(typ.) ...
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... See the "Erase and Programming Performance" section for more information. Elite Semiconductor Memory Technology Inc. Description Address Setup Time Address Hold Time Data Setup Time Data Hold Time WE Setup Time WE Hold Time CE Pulse Width CE Pulse Width High Byte Programming Word F49L160UA/F49L160BA = 0C to 70C 2.7V~3.6V -70 -90 Min. Max. Min. Max ...
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... Elite Semiconductor Memory Technology Inc F49L160UA/F49L160BA Publication Date : Jan. 2008 Revision: 1.8 27/50 ...
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... F49L160UA/F49L160BA Publication Date : Jan. 2008 Revision: 1.8 28/50 ...
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... Figure 8. Embedded Programming Algorithm Flowchart Elite Semiconductor Memory Technology Inc. F49L160UA/F49L160BA Start W rite Data AAH Address 555H W rite Data 55H Address 2AAH W rite Data A0H Address 555H W rite Program Data/Address Data Poll from system ...
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... F49L160UA/F49L160BA Publication Date : Jan ...
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... F49L160UA/F49L160BA Publication Date : Jan. 2008 Revision: 1 ...
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... W rite Data 55H Address 2AAH W rite Data 80H Address 555H W rite Data AAH Address 555H W rite Data 55H Address 2AAH W rite Data 10H Address 555H Data Poll from System N o Data = FFh Embedded Chip Erease Completed F49L160UA/F49L160BA Publication Date : Jan. 2008 Revision: 1.8 32/50 ...
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... F49L160UA/F49L160BA Publication Date : Jan. 2008 Revision: 1.8 33/50 ...
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... W rite Data 80H Address 555H W rite Data AAH Add ress 555H W rit e Data 55H Address 2AAH W rite Data 3 0H Address SA Last Sector to Erase Yes Data Po ll fro m System Data = FFH? Embedde d Sector Ere ase Co mplete d F49L160UA/F49L160BA No No Publication Date : Jan. 2008 Revision: 1.8 34/50 ...
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... Readi rite Data 30H Continue Erase An oth er Er ase Suspend? Elite Semiconductor Memory Technology Inc. Start F49L160UA/F49L160BA ERASE SUSPEND ERASE RESUME Publication Date : Jan. 2008 Revision: 1.8 35/50 ...
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... Elite Semiconductor Memory Technology Inc F49L160UA/F49L160BA Publication Date : Jan. 2008 Revision: 1 ...
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... PLSCNT = Dev ice failed F49L160UA/F49L160BA Start PLSCNT = 1 RESET = μ W ait Cyc ...
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... Figure 17. Sector Protect Timing Waveform (A9, OE Control) Elite Semiconductor Memory Technology Inc. F49L160UA/F49L160BA Publication Date : Jan. 2008 Revision: 1.8 38/50 ...
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... Set should remain V Read from Sector Address = SA, A0= Data = 01H? Protect Another Sector? Remov e VID from A9 W rite reset command Sector Protection F49L160UA/F49L160BA , Publication Date : Jan. 2008 Revision: 1.8 39/50 ...
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... DQ7 may change simultaneously with DQ5. Elite Semiconductor Memory Technology Inc. WRITE OPERATION STATUS Figure 19. Data Polling Algorithm Start Read DQ7~DQ0 Add. = VA( DQ7 = Data Read DQ7~DQ0 Add DQ7 = Data FAIL F49L160UA/F49L160BA Publication Date : Jan. 2008 Revision: 1.8 40/50 ...
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... Read DQ7 ~ DQ0 (Note Toggle Bit = DQ6 Toggle (Note 1,2) Read ice N o Toggle bit Tog gle Not complete, write reset command F49L160UA/F49L160BA Program / Erase operation complete Publication Date : Jan. 2008 Revision: 1.8 41/50 ...
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... F49L160UA/F49L160BA Publication Date : Jan. 2008 Revision: 1 ...
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... F49L160UA/F49L160BA Publication Date : Jan. 2008 Revision: 1 ...
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... Elite Semiconductor Memory Technology Inc. Table 17. AC CHARACTERISTICS Description Figure 23. RESET Timing Waveform F49L160UA/F49L160BA All Speed Options Max 20 Max 500 Min 500 Min 50 Min Publication Date : Jan. 2008 Revision: 1 ...
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... F49L160UA/F49L160BA All Speed Options Min 500 Min ...
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... Program Erase or Program Operation Temporary Sector Unprotect Completed (Note 2) Notes : 1. All protected status are temporary unprotect 10V~10. All previously protected sectors are protected again. Elite Semiconductor Memory Technology Inc. F49L160UA/F49L160BA Start RESET = V (Note 1) ID Operation Completed RESET = Publication Date : Jan. 2008 Revision: 1 ...
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... Elite Semiconductor Memory Technology Inc. Figure 27. ID Code Read Timing Waveform F49L160UA/F49L160BA Publication Date : Jan. 2008 Revision: 1.8 47/50 ...
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... Tested, Excludes external system level over head. 2.Typical values measured at 25°C, 3.3V. 3.Maximum values measured at 85°C, 2.7V. Elite Semiconductor Memory Technology Inc. Typ.(2) 0 Byte Mode 18 Word Mode 12 100,000 20 F49L160UA/F49L160BA Limits Max.( 300 360 54 36 Publication Date : Jan. 2008 Revision: 1.8 Unit Sec Sec Us ...
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... D 1 0.037 0.039 0.041 E 0.007 0.009 0.011 e L 0.007 0.008 0.009 0.004 ------- 0.008 θ 0.004 ------- 0.006 F49L160UA/F49L160BA Dimension in mm Dimension in inch Min Norm Max Min 20.00 BSC 0.787 BSC 18.40 BSC 0.724 BSC 12.00 BSC 0.472 BSC 0.50 BSC 0.020 BSC 0.50 0.60 0.70 0.020 ...
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... If products described here are to be used for such kinds of application, purchaser must do assurance testing appropriate to such applications. Elite Semiconductor Memory Technology Inc. F49L160UA/F49L160BA Important Notice its own quality Publication Date : Jan. 2008 Revision: 1.8 ...