AT80C51RD2-SLSUM Atmel, AT80C51RD2-SLSUM Datasheet - Page 54

• Manufacturer Part Number: AT80C51RD2-SLSUM
• Description: MCU, 8BIT, 8051, 5V, SPI, 20MHZ, 44PLCC
• Manufacturer: Atmel

Specifications of AT80C51RD2-SLSUM

• Controller Family/series: (8051) 8052
• No. Of I/o's: 32
• Ram Memory Size: 1280Byte
• Cpu Speed: 40MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 5
• Core Size: 8bit
• Oscillator Type: External Only
• Processor Series: AT80x
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Type: ROMLess
• Data Ram Size: 1280 B
• Interface Type: UART, SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Cpu Family: AT80
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 40MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 1.25KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.2.3
9.3
9.3.1
9.3.2
54
EPROM Programming
AT/TS8xC51Rx2
Signature bytes
Set-up Modes
Definition of Terms
WARNING: Security level 2 and 3 should only be programmed after EPROM and Core
verification.
The TS87C51RB2/RC2/RD2 contains 4 factory programmed signatures bytes. To read these
bytes, perform the process described in Section “Signature bytes”.
I n o r d e r t o p r o g r a m a n d v e r i f y t h e E P R O M o r t o r e a d t h e s i g n a t u r e b y t e s , t h e
TS87C51RB2/RC2/RD2 is placed in specific set-up modes (See Figure 9-1.).
Control and program signals must be held at the levels indicated in Table 9-2.
Address Lines:P1.0-P1.7, P2.0-P2.5, P3.4, P3.5 respectively for A0-A15 (P2.5 (A13) for RB,
P3.4 (A14) for RC, P3.5 (A15) for RD)
Data Lines:P0.0-P0.7 for D0-D7
Control Signals:RST, PSEN, P2.6, P2.7, P3.3, P3.6, P3.7.
Program Signals:ALE/PROG, EA/VPP.
Table 9-2.
Program Code data
Verify Code data
Program Encryption
Array Address 0-3Fh
Read Signature Bytes
Program Lock bit 1
Program Lock bit 2
Program Lock bit 3
EPROM Set-Up Modes
Mode
RST
1
1
1
1
1
1
1
PSEN
0
0
0
0
0
0
0
ALE/P
ROG
1
1
12.75V
12.75V
12.75V
12.75V
12.75V
EA/VP
P
1
1
P2.6
0
0
0
0
1
1
1
P2.7
1
1
1
1
0
P3.3
1
0
1
0
1
1
1
4188F–8051–01/08
P3.6
1
1
0
0
1
0
1
P3.7
1
1
1
0
1
0
0