ST7FLITE05Y0B6 FARNELL, ST7FLITE05Y0B6 Datasheet - Page 101
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ST7FLITE05Y0B6
Manufacturer Part Number
ST7FLITE05Y0B6
Description
IC, 8BIT MCU, ST7, 16MHZ, DIP-16
Manufacturer
FARNELL
Datasheet
1.ST7FLITE05Y0B6.pdf
(124 pages)
Specifications of ST7FLITE05Y0B6
Controller Family/series
ST7
No. Of I/o's
13
Ram Memory Size
128Byte
Cpu Speed
16MHz
No. Of Timers
2
Interface
SPI
Core Size
8 Bit
Program Memory Size
1.5 Kb
Peripherals
ADC, PWM, Timer
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FLITE05Y0B6
Manufacturer:
ST
Quantity:
20 000
CONTROL PIN CHARACTERISTICS (Cont’d)
Figure 76. RESET pin protection when LVD is enabled.
Figure 77. RESET pin protection when LVD is disabled.
Note 1:
Note 2: When the LVD is enabled, it is recommended not to connect a pull-up resistor or capacitor. A 10nF pull-down
capacitor is required to filter noise on the reset line.
Note 3: In case a capacitive power supply is used, it is recommended to connect a 1MΩ pull-down resistor to the RESET
pin to discharge any residual voltage induced by the capacitive effect of the power supply (this will add 5µA to the power
consumption of the MCU).
Note 4: Tips when using the LVD:
Note 5: See “Illegal Opcode Reset” on page 78. for more details on illegal opcode reset conditions
EXTERNAL
– The reset network protects the device against parasitic resets.
– The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad. Otherwise the
– Whatever the reset source is (internal or external), the user must ensure that the level on the RESET pin can go
– Because the reset circuit is designed to allow the internal RESET to be output in the RESET pin, the user must en-
– 1. Check that all recommendations related to ICCCLK and reset circuit have been applied (see caution in
– 2. Check that the power supply is properly decoupled (100nF + 10µF close to the MCU). Refer to AN1709 and
– 3. The capacitors connected on the RESET pin and also the power supply are key to avoid any start-up marginality.
RESET
device can be damaged when the ST7 generates an internal reset (LVD or watchdog).
below the V
internally.
sure that the current sunk on the RESET pin is less than the absolute maximum value specified for I
section 13.2.2 on page
on page 7
AN2017. If this cannot be done, it is recommended to put a 100nF + 1MΩ pull-down on the RESET pin.
In most cases, steps 1 and 2 above are sufficient for a robust solution. Otherwise: replace 10nF pull-down on the
RESET pin with a 5µF to 20µF capacitor.”
Required
EXTERNAL
CIRCUIT
RESET
USER
and notes above)
Required
IL
max. level specified in
0.01µF
82.
0.01µF
1MΩ
Optional
(note 3)
section 13.9.1 on page
V
V
DD
DD
R
R
ON
ON
Filter
Filter
100. Otherwise the reset will not be taken into account
1)2)3)4)
1)
GENERATOR
PULSE
GENERATOR
PULSE
ST7LITE0xY0, ST7LITESxY0
WATCHDOG
ILLEGAL OPCODE
WATCHDOG
ILLEGAL OPCODE
LVD RESET
INTERNAL
RESET
INTERNAL
RESET
INJ(RESET)
ST72XXX
ST72XXX
101/124
Table 1
5)
5)
in
1