ST7FLITE05Y0B6 FARNELL, ST7FLITE05Y0B6 Datasheet - Page 37

• Manufacturer Part Number: ST7FLITE05Y0B6
• Description: IC, 8BIT MCU, ST7, 16MHZ, DIP-16
• Manufacturer: FARNELL

Specifications of ST7FLITE05Y0B6

• Controller Family/series: ST7
• No. Of I/o's: 13
• Ram Memory Size: 128Byte
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Interface: SPI
• Core Size: 8 Bit
• Program Memory Size: 1.5 Kb
• Peripherals: ADC, PWM, Timer
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9 POWER SAVING MODES
9.1 INTRODUCTION
To give a large measure of flexibility to the applica-
tion in terms of power consumption, four main
power saving modes are implemented in the ST7
(see
TIVE HALT and HALT.
After a RESET the normal operating mode is se-
lected by default (RUN mode). This mode drives
the device (CPU and embedded peripherals) by
means of a master clock which is based on the
main oscillator frequency (f
From RUN mode, the different power saving
modes may be selected by setting the relevant
register bits or by calling the specific ST7 software
instruction whose action depends on the oscillator
status.
Figure 22. Power Saving Mode Transitions
Figure
22): SLOW, WAIT (SLOW WAIT), AC-
ACTIVE HALT
SLOW WAIT
POWER CONSUMPTION
SLOW
HALT
WAIT
RUN
OSC
Low
High
).
9.2 SLOW MODE
This mode has two targets:
– To reduce power consumption by decreasing the
– To adapt the internal clock frequency (f
SLOW mode is controlled by the SMS bit in the
MCCSR register which enables or disables Slow
mode.
In this mode, the oscillator frequency is divided by
32. The CPU and peripherals are clocked at this
lower frequency.
Notes:
SLOW-WAIT mode is activated when entering
WAIT mode while the device is already in SLOW
mode.
SLOW mode has no effect on the Lite Timer which
is already clocked at F
Figure 23. SLOW Mode Clock Transition
internal clock in the device,
the available supply voltage.
SMS
f
CPU
f
OSC
ST7LITE0xY0, ST7LITESxY0
OSC/32
f
OSC
NORMAL RUN MODE
.
/32
REQUEST
f
OSC
CPU
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) to
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