MCIMX535DVV1C Freescale Semiconductor, MCIMX535DVV1C Datasheet - Page 79

• Manufacturer Part Number: MCIMX535DVV1C
• Description: IMX53 REV 2.1 COMM
• Manufacturer: Freescale Semiconductor

Specifications of MCIMX535DVV1C

• Rohs Compliant: YES
• Core Size: 32bit
• Program Memory Size: 288KB
• Cpu Speed: 1GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 529
• Supply Voltage Range: 1.25V To 1.35V
• Operating Temperature Range: -20°C To +85°C
• Msl: MSL 3 - 168 Hours
• Embedded Interface Type: I2C, SPI, UART
• Lead Free Status / Rohs Status: Supplier Unconfirmed

4.7.5.2
The MII transmit signal timing affects the FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER, and
FEC_TX_CLK signals. The transmitter functions correctly up to a FEC_TX_CLK maximum frequency
of 25 MHz + 1%. There is no minimum frequency requirement. In addition, the processor clock frequency
must exceed twice the FEC_TX_CLK frequency.
Table 53
diagram for the values listed in
Freescale Semiconductor
1
2
FEC_TX_EN, FEC_TX_CLK, and FEC_TXD0 have the same timing in 10 Mbps 7-wire interface mode.
Test conditions: 25pF on each output signal.
Num
M5
M6
M7
M8
FEC_RXD[3:0] (inputs)
FEC_RX_CLK (input)
lists MII transmit channel timing parameters.
FEC_TX_CLK to FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER invalid
FEC_TX_CLK to FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER valid
FEC_TX_CLK pulse width high
FEC_TX_CLK pulse width low
MII Transmit Signal Timing
FEC_RX_ER
FEC_RX_DV
i.MX53xD Applications Processors for Consumer Products, Rev. 3
Figure 38. MII Receive Signal Timing Diagram
Characteristic
Table
Table 53. MII Transmit Signal Timing
53.
M1
1 2
M2
M3
Figure 39
shows MII transmit signal timing
35%
35%
Min
—
M4
5
Max
65%
65%
—
20
Electrical Characteristics
FEC_TX_CLK period
FEC_TX_CLK period
Unit
ns
ns
79