LH75411N0Q100C0 NXP Semiconductors, LH75411N0Q100C0 Datasheet - Page 14

• Manufacturer Part Number: LH75411N0Q100C0
• Description: MCU ARM7, LCD CTRL, SMD, LQFP144
• Manufacturer: NXP Semiconductors

Specifications of LH75411N0Q100C0

• Core Size: 32bit
• No. Of I/o's: 76
• Ram Memory Size: 32KB
• Cpu Speed: 84MHz
• Oscillator Type: External Only
• No. Of Timers: 3
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 1.7V To 1.98V, 3V To 3.6V
• Controller Family/series: LH75xxx
• Peripherals: ADC, RTC, LVD
• Rohs Compliant: Yes
• Data Bus Width: 32 bit
• Program Memory Type: ROMLess
• Data Ram Size: 32 KB
• Interface Type: JTAG, SCI, SPI, SSI, UART
• Maximum Clock Frequency: 84 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LH75401/LH75411
NOTES:
1. These pin numbers have multiplexed functions.
2. Signals preceded with ‘n’ are active LOW.
14
PIN NO. SIGNAL NAME
112
126
134
106
119
127
140
73
74
76
77
78
79
81
82
83
86
87
63
64
65
66
67
68
69
17
34
42
54
98
26
41
48
59
11
75
14
80
70
84
85
88
97
3
8
INT5
INT4
INT3
INT2
INT1
INT0
nPOR
XTAL32IN
XTAL32OUT
XTALIN
XTALOUT
TEST2
TEST1
TMS
RTCK
TCK
TDI
TDO
VDD
VSS
VDDC
VSSC
LINREGEN
VSSA_PLL
VDDA_PLL
VSSA_ADC
VDDA_ADC
Output
Output
Output
Output
Power
Power
Power
Power
Power
Power
Power
Power
TYPE
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Table 3. LH75401 Signal Descriptions (Cont’d)
External Interrupt Input 5
External Interrupt Input 4
External Interrupt Input 3
External Interrupt Input 2
External Interrupt Input 1
External Interrupt Input 0
Power-on Reset Input
32.768 kHz Crystal Clock Input
32.768 kHz Crystal Clock Output
Crystal Clock Input
Crystal Clock Output
Test Mode Pin 2
Test Mode Pin 1
JTAG Test Mode Select Input
Returned JTAG Test Clock Output
JTAG Test Clock Input
JTAG Test Serial Data Input
JTAG Test Data Serial Output
I/O Ring VDD
I/O Ring VSS
Core VDD supply (Output if Linear Regulator Enabled, Otherwise Input)
Core VSS
Linear Regulator Enable
PLL Analog VSS
PLL Analog VDD Supply
A-to-D converter Analog VSS
A-to-D converter Analog VDD Supply
POWER AND GROUND (GND)
NXP Semiconductors
Rev. 01 — 16 July 2007
TEST INTERFACE
DESCRIPTION
Preliminary data sheet
System-on-Chip
NOTES
1
1
1
1
1
1
2