PIC18F2320-E/SO Microchip Technology, PIC18F2320-E/SO Datasheet - Page 157

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PIC18F2320-E/SO

Manufacturer Part Number
PIC18F2320-E/SO
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F2320-E/SO

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
17.0
17.1
The Master Synchronous Serial Port (MSSP) module is
a serial interface useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
The I
hardware:
• Master mode
• Multi-Master mode
• Slave mode
17.2
The MSSP module has three associated registers.
These include a status register (SSPSTAT) and two
control registers (SSPCON1 and SSPCON2). The use
of these registers and their individual Configuration bits
differ significantly, depending on whether the MSSP
module is operated in SPI or I
Additional details are provided under the individual
sections.
© 2007 Microchip Technology Inc.
- Full Master mode
- Slave mode (with general address call)
2
C interface supports the following modes in
MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
Master SSP (MSSP) Module
Overview
Control Registers
2
C)
2
C mode.
PIC18F2220/2320/4220/4320
17.3
The SPI mode allows 8 bits of data to be synchronously
transmitted and received, simultaneously. All four
modes
communication, typically three pins are used:
• Serial Data Out (SDO) – RC5/SDO
• Serial Data In (SDI) – RC4/SDI/SDA
• Serial Clock (SCK) – RC3/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RA5/AN4/SS/LVDIN/C2OUT
Register 17-1 shows the block diagram of the MSSP
module when operating in SPI mode.
FIGURE 17-1:
LVDIN/C2OUT
RA5/AN4/SS/
RC4/SDI/SDA
RC3/SCK/
RC5/SDO
SCL
SPI Mode
of
SPI
Read
SS Control
are
Select
SMP:CKE
Edge
MSSP BLOCK DIAGRAM
(SPI MODE)
Enable
Select
bit 0
Edge
supported.
TRIS bit
Data to TX/RX in SSPSR
SSPBUF reg
2
SSPM3:SSPM0
SSPSR reg
Clock Select
4
2
DS39599G-page 155
To
(
Prescaler
4, 16, 64
TMR2 Output
Write
Clock
Shift
accomplish
Data Bus
Internal
2
T
OSC
)

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