AD9983A/PCBZ Analog Devices Inc, AD9983A/PCBZ Datasheet - Page 10

• Manufacturer Part Number: AD9983A/PCBZ
• Description: Pb-free EVALUATION Kit AD9983A
• Manufacturer: Analog Devices Inc
• Series: Advantiv®r

Specifications of AD9983A/PCBZ

• Main Purpose: Video, Video Processing
• Embedded: No
• Utilized Ic / Part: AD9983A
• Primary Attributes: 3 x 8-Bit 140 MSPS ADC's
• Secondary Attributes: Integrated PLL & VCO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9983A
THEORY OF OPERATION
The AD9983A is a fully integrated solution for capturing analog
RGB or YPbPr signals and digitizing them for display on
advanced TVs, flat panel monitors, projectors, and other types
of digital displays. Implemented in a high performance CMOS
process, the interface can capture signals with pixel rates of up
to 140 MHz.
The AD9983A includes all necessary input buffering, signal dc
restoration (clamping), offset and gain (brightness and contrast)
adjustment, pixel clock generation, sampling phase control, and
output data formatting. All controls are programmable via a
2-wire serial interface (I
analog functions makes system design straightforward and less
sensitive to the physical and electrical environment.
With a typical power dissipation of less than 800 mW and an
operating temperature range of 0°C to 70°C, the device requires
no special environmental considerations.
DIGITAL INPUTS
All digital inputs on the AD9983A operate to 3.3 V CMOS
levels. The following digital inputs are 5 V tolerant (that is, applying
5 V to them does not cause any damage.): HSYNC0, HSYNC1,
VSYNC0, VSYNC1, SOGIN0, SOGIN1, SDA, SCL and CLAMP.
ANALOG INPUT SIGNAL HANDLING
The AD9983A has six high impedance analog input pins for the
red, green, and blue channels. They accommodate signals
ranging from 0.5 V to 1.0 V p-p.
Signals are typically brought onto the interface board with a
DVI-I connector, a 15-pin D connector, or RCA connectors.
The AD9983A should be located as close as possible to the
input connector. Signals should be routed using matched-
impedance traces (normally 75 Ω) to the IC input pins.
At the input pins the signal should be resistively terminated
(75 Ω to the signal ground return) and capacitively coupled to
the AD9983A inputs through 47 nF capacitors. These capacitors
form part of the dc restoration circuit.
In an ideal world of perfectly matched impedances, the best
performance can be obtained with the widest possible signal
bandwidth. The wide bandwidth inputs of the AD9983A
(300 MHz) can track the input signal continuously as it moves
from one pixel level to the next and can digitize the pixel during
a long, flat pixel time. In many systems, however, there are
mismatches, reflections, and noise, which can result in excessive
ringing and distortion of the input waveform. This makes it
more difficult to establish a sampling phase that provides good
image quality. A small inductor in series with the input is
effective in rolling off the input bandwidth slightly and
providing a high quality signal over a wider range of conditions.
Using a Fair-Rite #2508051217Z0-High Speed, Signal Chip
Bead Inductor in the circuit shown in Figure 3 provides good
results in most applications.
2
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HSYNC AND VSYNC INPUTS
The interface also accepts Hsync and Vsync signals, which are
used to generate the pixel clock, clamp timing, coast and field
information. These can be either a sync signal directly from the
graphics source, or a preprocessed TTL- or CMOS-level signal.
The Hsync input includes a Schmitt trigger buffer for immunity
to noise and signals with long rise times. In typical PC-based
graphic systems, the sync signals are simply TTL-level drivers
feeding unshielded wires in the monitor cable. As such, no
termination is required.
SERIAL CONTROL PORT
The serial control port is designed for 3.3 V logic; however, it is
tolerant of 5 V logic signals. Refer to the 2-Wire Serial Control
Port section.
OUTPUT SIGNAL HANDLING
The digital outputs operate from 1.8 V to 3.3 V (V
CLAMPING
RGB Clamping
To properly digitize the incoming signal, the dc offset of the
input must be adjusted to fit the range of the on-board ADCs.
Most graphics systems produce RGB signals with black at
ground and white at approximately 0.75 V. However, if sync
signals are embedded in the graphics, the sync tip is often at
ground, black is at 300 mV, and white is at approximately 1.0 V.
Some common RGB line amplifier boxes use emitter-follower
buffers to split signals and increase drive capability. This
introduces a 700 mV dc offset to the signal, which must be
removed for proper capture by the AD9983A.
The key to clamping is to identify a portion (time) of the signal
when the graphic system is known to be producing black. An
offset is then introduced that results in the ADC producing a
black output (Code 0x00) when the known black input is
present. The offset then remains in place when other signal
levels are processed, and the entire signal is shifted to eliminate
offset errors.
INPUT
RGB
Figure 3. Analog Input Interface Circuit
75Ω
47nF
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