AD9983A/PCBZ Analog Devices Inc, AD9983A/PCBZ Datasheet - Page 28

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AD9983A/PCBZ

Manufacturer Part Number
AD9983A/PCBZ
Description
Pb-free EVALUATION Kit AD9983A
Manufacturer
Analog Devices Inc
Series
Advantiv®r
Datasheet

Specifications of AD9983A/PCBZ

Main Purpose
Video, Video Processing
Embedded
No
Utilized Ic / Part
AD9983A
Primary Attributes
3 x 8-Bit 140 MSPS ADC's
Secondary Attributes
Integrated PLL & VCO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9983A
Hex
Address
0x2C
0x2D
0x2E
0x34
0x36
0x3C
1
2
Functions with more than eight control bits, such as PLL divide ratio, gain, and offset, are only updated when the LSBs are written to (for example, Register 0x02 for
PLL divide ratio).
Gain registers (Register 0x05, Register 0x07, and Register 0x09) when written must each be followed with a write to their next register: Register 0x05 and Register 0x06,
Register 0x07, and Register 0x08, and Register 0x09 and Register 0x0A.
Read/Write,
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
Bits
7:5
4
3:0
7:0
7:0
2
0
7:4
3
2:0
Default
Value
000* ****
***0 ****
**** 0000
1111 0000
1111 0000
**** *0**
**** ***0
0000 ****
**** 0***
**** *000
Register Name
Offset Hold
TestReg5
TestReg6
SOG Filter
VCO Gear
Auto Gain
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Description
Must be written to default for proper operation.
Auto-Offset Hold.
Disables the auto-offset and holds the feedback result.
0 = One time update
1 = Continuous update
Must be written to default for proper operation.
Must be written to Reg. 0xE8 for proper operation.
Must be written to Reg. 0xE0 for proper operation.
SOG Filter Enable.
0 = Disable SOG filter
1 = Enable SOG filter
VCO Gear adds another range to the VCO—used for lower
frequencies only.
0 = Disable low VCO gear
1 = Enable low VCO gear
Must be set to default for proper operation
Auto Gain Matching Hold
0 = Disables auto gain updates and holds the current auto offset
values.
1 = Allows auto gain to update continuously
Auto Gain Matching Enable
000 = Auto gain is disabled
110= Auto gain is enabled

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