DSPIC33EP512MU810-I/PF Microchip Technology, DSPIC33EP512MU810-I/PF Datasheet - Page 140

• Manufacturer Part Number: DSPIC33EP512MU810-I/PF
• Description: 100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 14x14x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP512MU810-I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 512KB (170K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 24K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
REGISTER 7-2:
DS70616E-page 140
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 3
Note 1:
R/W-0
R/W-0
SATA
VAR
2:
For complete register details, see
The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU Interrupt Priority Level.
VAR: Variable Exception Processing Latency Control bit
1 = Variable exception processing enabled
0 = Fixed exception processing enabled
IPL3: CPU Interrupt Priority Level Status bit 3
1 = CPU interrupt priority level is greater than 7
0 = CPU interrupt priority level is 7 or less
R/W-0
SATB
U-0
—
CORCON: CORE CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
SATDW
R/W-0
R/W-1
US<1:0>
Register 3-2: “CORCON: Core Control
ACCSAT
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(2)
IPL3
R/W-0
R/C-0
EDT
(2)
(1)
SFA
R-0
R-0
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Register”.
x = Bit is unknown
DL<2:0>
R/W-0
RND
R-0
R/W-0
R-0
IF
bit 8
bit 0