DSPIC33EP512MU810-I/PF Microchip Technology, DSPIC33EP512MU810-I/PF Datasheet - Page 5

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DSPIC33EP512MU810-I/PF

Manufacturer Part Number
DSPIC33EP512MU810-I/PF
Description
100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 14x14x1mm T
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP512MU810-I/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
83
Program Memory Size
512KB (170K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
24K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33EP512MU810-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Motor Control Peripherals (Continued):
(dsPIC33EPXXXMU806/810/814 Devices
Only)
• Quadrature Encoder Interface (QEI):
Communication Modules:
• USB On-The-Go (OTG):
• USB module can use any RAM location on the
• 4-wire SPI (up to four modules):
• I
 2009-2011 Microchip Technology Inc.
- 32-bit position counter
- 32-bit Index pulse counter
- 32-bit Interval timer
- 16-bit velocity counter
- 32-bit Position Initialization/Capture/Compare
- 32-bit Position Compare Low register
- x4 Quadrature Count mode
- External Up/Down Count mode
- External Gated Count mode
- External Gated Timer mode
- Internal Timer mode
- Can be configured as a general purpose timer
- USB v2.0 On-The-Go (OTG) compliant
- Dual role capable – can act as either Host or
- Low-speed (1.5 Mbps) and Full-speed
- High-precision PLL for USB
- Supports up to 32 endpoints (16 bidirectional):
device as USB endpoint buffers:
- On-chip USB transceiver
- Interface for Off-chip USB transceiver
- On-chip pull-up and pull-down resistors
- Framing supports I/O interface to simple
- Supports 8-bit and 16-bit data
- Supports all serial clock formats and
- Full Multi-Master Slave mode support
- 7-bit and 10-bit addressing
- Bus collision detection and arbitration
- Integrated signal conditioning
- Slave address masking
- IPMI support
- SMBus support
2
C™ (up to two modules):
High register
Peripheral
(12 Mbps) USB operation in Host mode
codecs
sampling modes
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
Preliminary
Communication Modules (Continued):
• UART (up to four modules):
• Enhanced CAN (ECAN™) 2.0B active (up to two
• Parallel Master Slave Port (PMP/EPSP):
• Programmable Cyclic Redundancy Check (CRC):
Packaging:
• 64-pin QFN (9x9x0.9 mm)
• 64-pin TQFP (10x10x1 mm)
• 100-pin TQFP (12x12x1 mm)
• 100-pin TQFP (14x14x1 mm)
• 121-pin XBGA (10x10x1.2 mm)
• 144-pin LQFP (20x20x1.4 mm)
• 144-pin TQFP (16x16x1 mm)
- Interrupt on address bit detect
- Interrupt on UART error
- Wake-up on Start bit from Sleep mode
- 4-character TX and RX FIFO buffers
- LIN bus support
- IrDA
- High-Speed Baud mode
- Hardware Flow Control with CTS and RTS
modules):
- Up to eight transmit and up to 32 receive buffers
- 16 receive filters and three masks
- Loopback, Listen Only and Listen All
- Messages modes for diagnostics and bus
- Wake-up on CAN message
- Automatic processing of Remote
- FIFO mode using DMA
- DeviceNet™ addressing support
- Supports 8-bit or 16-bit data
- Supports up to 16 address lines
- Programmable bit length for the CRC
- 4x32, 8x16 or 16x8 FIFO for data input
Note:
monitoring
Transmission Requests
generator polynomial (up to 32-bit length)
®
encoding and decoding in hardware
See
per device.
Table 1
for exact peripheral features
DS70616E-page 5

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