DSPIC33EP512MU810-I/PF Microchip Technology, DSPIC33EP512MU810-I/PF Datasheet - Page 190

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DSPIC33EP512MU810-I/PF

Manufacturer Part Number
DSPIC33EP512MU810-I/PF
Description
100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 14x14x1mm T
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP512MU810-I/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
83
Program Memory Size
512KB (170K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
24K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33EP512MU810-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
11.1.1
In addition to the PORT, LAT and TRIS registers for
data control, some port pins can also be individually
configured for either digital or open-drain output. This
is controlled by the Open-Drain Control register,
ODCx, associated with each port. Setting any of the
bits configures the corresponding pin to act as an
open-drain output.
The open-drain feature allows the generation of
outputs higher than V
by using external pull-up resistors. The maximum
open-drain voltage allowed is the same as the
maximum V
See the
and their functionality.
11.2
The ANSELx register controls the operation of the
analog port pins. The port pins that are to function as
analog inputs must have their corresponding ANSEL
and TRIS bits set. In order to use port pins for I/O
functionality with digital modules, such as Timers,
UARTs, etc., the corresponding ANSELx bit must be
cleared.
The ANSELx register has a default value of 0xFFFF;
therefore, all pins that share analog functions are
analog (not digital) by default.
If the TRIS bit is cleared (output) while the ANSELx bit
is set, the digital output level (V
by an analog peripheral, such as the ADC module or
Comparator module.
When the PORT register is read, all pins configured as
analog input channels are read as cleared (a low level).
Pins configured as digital inputs do not convert an
analog input. Analog levels on any pin defined as a
digital input (including the ANx pins) can cause the
input buffer to consume current that exceeds the
device specifications.
11.2.1
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically this instruction
would be an NOP, as shown in
DS70616E-page 190
“Pin
Configuring Analog and Digital
Port Pins
OPEN-DRAIN CONFIGURATION
I/O PORT WRITE/READ TIMING
IH
Diagrams” section for the available pins
specification for that pin.
DD
(e.g., 5V on a 5V tolerant pin)
Example
OH
or V
OL
11-1.
) is converted
Preliminary
11.3
The input change notification function of the I/O ports
allows
PIC24EPXXXGU810/814 devices to generate interrupt
requests to the processor in response to a change-of-
state on selected input pins. This feature can detect
input change-of-states even in Sleep mode, when the
clocks are disabled. Every I/O port pin can be selected
(enabled) for generating an interrupt request on a
change-of-state.
Three control registers are associated with the CN
functionality of each I/O port. The CNENx registers
contain the CN interrupt enable control bits for each of
the input pins. Setting any of these bits enables a CN
interrupt for the corresponding pins.
Each I/O pin also has a weak pull-up and a weak
pull-down connected to it. The pull-ups act as a
current source or sink source connected to the pin,
and eliminate the need for external resistors when
push-button or keypad devices are connected. The
pull-ups and pull-downs are enabled separately using
the CNPUx and the CNPDx registers, which contain
the control bits for each of the pins. Setting any of
the control bits enables the weak pull-ups and/or
pull-downs for the corresponding pins.
EXAMPLE 11-1:
MOV
MOV
NOP
BTSS
Note:
0xFF00, W0
W0, TRISB
PORTB, #13
Input Change Notification
the
Pull-ups and pull-downs on change notifi-
cation pins should always be disabled
when the port pin is configured as a digital
output.
dsPIC33EPXXXMU806/810/814
 2009-2011 Microchip Technology Inc.
PORT WRITE/READ
EXAMPLE
; Configure PORTB<15:8>
; as inputs
; and PORTB<7:0>
; as outputs
; Delay 1 cycle
; Next Instruction
and

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