DSPIC33EP512MU810-I/PF Microchip Technology, DSPIC33EP512MU810-I/PF Datasheet - Page 397

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DSPIC33EP512MU810-I/PF

Manufacturer Part Number
DSPIC33EP512MU810-I/PF
Description
100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 14x14x1mm T
Manufacturer
Microchip Technology
Series
dsPIC™ 33EPr
Datasheet

Specifications of DSPIC33EP512MU810-I/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
60 MIPs
Connectivity
CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
83
Program Memory Size
512KB (170K x 24)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
24K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP
Rohs Compliant
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33EP512MU810-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
REGISTER 24-2:
 2009-2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-10
bit 9
bit 8-5
bit 4
bit 3-0
R/W-0
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
U-0
COFSG<2:0>
Reserved: Read as ‘0’
BLEN<1:0>: Buffer Length Control bits
11 = Four data words will be buffered between interrupts
10 = Three data words will be buffered between interrupts
01 = Two data words will be buffered between interrupts
00 = One data word will be buffered between interrupts
Reserved: Read as ‘0’
COFSG<3:0>: Frame Sync Generator Control bits
1111 = Data frame has 16 words
0010 = Data frame has 3 words
0001 = Data frame has 2 words
0000 = Data frame has 1 word
Reserved: Read as ‘0’
WS<3:0>: DCI Data Word Size bits
1111 = Data word size is 16 bits
0100 = Data word size is 5 bits
0011 = Data word size is 4 bits
0010 = Invalid Selection. Do not use. Unexpected results may occur.
0001 = Invalid Selection. Do not use. Unexpected results may occur.
0000 = Invalid Selection. Do not use. Unexpected results may occur.
R/W-0
U-0
DCICON2: DCI CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
R/W-0
U-0
U-0
U-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
BLEN<1:0>
R/W-0
R/W-0
WS<3:0>
x = Bit is unknown
R/W-0
U-0
DS70616E-page 397
COFSG3
R/W-0
R/W-0
bit 8
bit 0

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