KSZ8851-16MLL Micrel Inc, KSZ8851-16MLL Datasheet - Page 33
![Single Ethernet Port + Generic (16-bit) Bus Interface( )](/photos/6/81/68171/576-48-lqfp_sml.jpg)
KSZ8851-16MLL
Manufacturer Part Number
KSZ8851-16MLL
Description
Single Ethernet Port + Generic (16-bit) Bus Interface( )
Manufacturer
Micrel Inc
Specifications of KSZ8851-16MLL
Controller Type
Ethernet Controller, MAC/PHY
Interface
Bus
Voltage - Supply
1.8V, 2.5V, 3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-3292 - BOARD EVALUATION KSZ8851-16MLL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-3252
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
KSZ8851-16MLL
Manufacturer:
Kendin
Quantity:
1 490
Part Number:
KSZ8851-16MLL
Manufacturer:
MICREL/麦瑞
Quantity:
20 000
Part Number:
KSZ8851-16MLLI
Manufacturer:
MICREL/麦瑞
Quantity:
20 000
Company:
Part Number:
KSZ8851-16MLLI TR
Manufacturer:
Kendin
Quantity:
225
Company:
Part Number:
KSZ8851-16MLLI TR
Manufacturer:
Micrel Inc
Quantity:
10 000
Company:
Part Number:
KSZ8851-16MLLJ
Manufacturer:
Micrel
Quantity:
2 099
Company:
Part Number:
KSZ8851-16MLLTR
Manufacturer:
TIMONTA
Quantity:
23
Company:
Part Number:
KSZ8851-16MLLU
Manufacturer:
Micrel
Quantity:
2 019
Micrel, Inc.
KSZ8851-16MLL/MLLI
CPU Interface I/O Registers
The KSZ8851-16MLL provides an SRAM-like asynchronous bus interface for the CPU to access its internal I/O registers.
I/O registers serve as the address that the microprocessor uses when communicating with the device. This is used for
configuring operational settings, reading or writing control, status information, and transferring packets. The KSZ8851-
16MLL can be programmed to interface with either Big-Endian or Little-Endian processor.
I/O Registers
The following I/O Space Mapping Tables apply to 8 or 16-bit bus interface. Depending upon the bus mode selected, each
I/O access can be performed the following operations:
In 8-bit bus mode, there are 256 address locations which is based on SD[7:0] for address when CMD=1. The SD[7:0] is
for data when CMD=0.
In 16-bit bus mode, there are 64 address locations which is based on SD[7:2] ([1:0] is “don’t care”) for address and
SD[15:12] for Byte Enable BE[3:0] (either one byte or two bytes) when CMD=1. The SD[15:0] is for data when CMD=0.
August 2009
33
M9999-083109-2.0