KSZ8851-16MLL Micrel Inc, KSZ8851-16MLL Datasheet - Page 50

• Manufacturer Part Number: KSZ8851-16MLL
• Description: Single Ethernet Port + Generic (16-bit) Bus Interface( )
• Manufacturer: Micrel Inc

Specifications of KSZ8851-16MLL

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Bus
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 576-3292 - BOARD EVALUATION KSZ8851-16MLL
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-3252

Receive Control Register 2 (0x76 – 0x77): RXCR2
This register holds control information programmed by the CPU to control the receive function.
TXQ Memory Information Register (0x78 – 0x79): TXMIR
This register indicates the amount of free memory available in the TXQ of the QMU module.
0x7A – 0x7B: Reserved
Receive Frame Header Status Register (0x7C – 0x7D): RXFHSR
This register indicates the received frame header status information, the received frames are reported in RXFCTR
register. This register contains the status information for the frame received and the CPU can read so many times same
as the frame count value in the RXFCTR.
August 2009
Micrel, Inc.
Bit
15-5
4
3
2
1
0
Bit
15-13
12-0
Bit
15
14
13
-
0x0
0x0
0x1
0x0
0x0
-
-
-
-
-
Default Value
Default Value
Default Value
R/W
RO
RW
RW
RW
RW
RW
R/W
RO
RO
R/W
RO
RO
RO
Description
Reserved.
IUFFP IPV4/IPV6/UDP Fragment Frame Pass
When this bit is set, the KSZ8851-16MLL will pass the checksum check at receive side for
IPv4/IPv6 UDP frame with fragment extension header.
When this bit is cleared, the KSZ8851-16MLL will perform checksum operation based on
configuration and doesn’t care whether it’s a fragment frame or not.
RXIUFCEZ Receive IPV4/IPV6/UDP Frame Checksum Equal Zero
When this bit is set, the KSZ8851-16MLL will pass the filtering for IPv4/IPv6 UDP frame
with UDP checksum equal to zero.
When this bit is cleared, the KSZ8851-16MLL will drop IPv4/IPv6 UDP packet with UDP
checksum equal to zero.
UDPLFE UDP Lite Frame Enable
When this bit is set, the KSZ8851-16MLL will check the checksum at receive side and
generate the checksum at transmit side for UDP Lite frame.
When this bit is cleared, the KSZ8851-16MLL will pass the checksum check at receive
side and skip the checksum generation at transmit side for UDP Lite frame.
RXICMPFCC Receive ICMP Frame Checksum Check Enable
When this bit is set, the KSZ8851 will check for correct ICMP checksum for incoming
ICMP frames (only for non-fragment frame). Any received ICMP frames with incorrect
checksum will be discarded.
RXSAF Receive Source Address Filtering
When this bit is set, the KSZ8851-16MLL will drop the frame if the source address is
same as MAC address in MARL, MARM, MARH registers.
Description
Reserved.
TXMA Transmit Memory Available
The amount of memory available is represented in units of byte. The TXQ memory is
used for both frame payload, control word.
Note: Software must be written to ensure that there is enough memory for the next
transmit frame including control information before transmit data is written to the TXQ.
Description
RXFV Receive Frame Valid
When this bit is set, it indicates that the present frame in the receive packet memory is
valid. The status information currently in this location is also valid.
When clear, it indicates that there is either no pending receive frame or that the current
frame is still in the process of receiving.
Reserved
RXICMPFCS Receive ICMP Frame Checksum Status
50
KSZ8851-16MLL/MLLI
M9999-083109-2.0