DS21455 Maxim Integrated Products, DS21455 Datasheet - Page 216

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DS21455

Manufacturer Part Number
DS21455
Description
Network Controller & Processor ICs Quad E1-T1-J1 Single -Chip Transceiver (S
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of DS21455

Product
Framer
Number Of Transceivers
4
Data Rate
64 Kbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
328 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Package / Case
BGA

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35. JTAG-BOUNDARY-SCAN ARCHITECTURE AND TEST-ACCESS PORT
The
SAMPLE/PRELOAD, BYPASS, and EXTEST. Optional public instructions included are HIGH-Z,
CLAMP, and IDCODE. The DS21455/DS21458 contain the following as required by IEEE 1149.1
Standard Test-Access Port and Boundary-Scan Architecture:
The Test Access Port has the necessary interface pins: JTRST, JTCLK, JTMS, JTDI, and JTDO. See the
pin descriptions for details.
Figure 35-1. JTAG Functional Block Diagram
Test Access Port (TAP)
TAP Controller
Instruction Register
Bypass Register
Boundary Scan Register
Device Identification Register
DS21455/DS21458
10k Ω
V
DD
JTDI
10k Ω
IEEE
V
DD
JTMS
TEST ACCESS PORT
BOUNDRY SCAN
IDENTIFICATION
1149.1
CONTROLLER
INSTRUCTION
REGISTER
REGISTER
REGISTER
REGISTER
BYPASS
JTCLK
design
10k Ω
216 of 270
V
DD
JTRST
supports
SELECT
OUTPUT ENABLE
MUX
the
standard
JTDO
instruction
codes

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