DS3112N+W Maxim Integrated Products, DS3112N+W Datasheet - Page 99
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DS3112N+W
Manufacturer Part Number
DS3112N+W
Description
Network Controller & Processor ICs M13-E13-G.747 Mux an d T3-E3 Framer T3-E3
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3112.pdf
(133 pages)
Specifications of DS3112N+W
Product
Framer
Number Of Transceivers
1
Data Rate
44.736 Mbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
150 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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11 JTAG
The DS3112 device supports the standard instruction codes SAMPLE/PRELOAD, BYPASS, and
EXTEST. Optional public instructions included are HIGHZ, CLAMP, IDCODE
DS3112 contains the following items that meet the requirements set by the IEEE 1149.1 Standard Test
Access Port and Boundary Scan Architecture:
The Test Access Port has the necessary interface pins, namely JTCLK, JTRST, JTDI, JTDO, and JTMS.
Details on these pins can be found in Section 2.9. Details on the Boundary Scan Architecture and the Test
Access Port can be found in IEEE 1149.1-1990, IEEE 1149.1a-1993, and IEEE 1149.1b-1994.
Figure 11-1. JTAG Block Diagram
Test Access Port (TAP)
TAP Controller
Instruction Register
Bypass Register
Boundary Scan Register
Device Identification Register
10K
JTDI
10K
JTMS
Boundary Scan
Register
Identification
Register
Bypass
Register
Instruction
Register
Test Access Port
Controller
99 of 133
JTCLK
10K
JTRST
Select
Tri-State
Mux
JTDO
(Figure
11-1). The
DS3112
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