CS8900A-IQ3ZR Cirrus Logic Inc, CS8900A-IQ3ZR Datasheet - Page 21

• Manufacturer Part Number: CS8900A-IQ3ZR
• Description: Ethernet ICs IC 10Mbps Ethernet Controller 3.3V
• Manufacturer: Cirrus Logic Inc

Specifications of CS8900A-IQ3ZR

• Ethernet Connection Type: 10Base- 2, 10Base- 5, 10Base- F, 10Base- T
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Standard Supported: IEEE 802.3
• Data Rate: 10 Mbps
• Maximum Operating Temperature: + 85 C
• Package / Case: LQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS271F5
* I/O base address is unaffected by Software Suspend mode.
CS8900A
Crystal LAN™ Ethernet Controller
‘C46 (non-sequential)
‘CS46 (sequential)
‘C56 (non-sequential)
‘CS56 (sequential)
‘C66 (non-sequential)
‘CS66 (sequential)
PacketPage
Address
002Ah
002Ch
010Ah
010Ch
010Eh
0020h
0022h
0024h
0026h
0028h
0030h
0034h
0102h
0104h
0106h
0108h
0110h
0112h
0114h
0116h
0118h
EEPROM Type
Table 5. Supported EEPROM Types
Table 4.
0300h
XXXX XXXX
XXXX X100
XXXX XXXX
XXXX XX11
0000h
X000h
0000h
XXX0 0000h Memory Base Address
XXX0 0000h Boot PROM Base
XXX0 0000h Boot PROM Address
0003h
0005h
0007h
0009h
000Bh
Undefined
Undefined
Undefined
00013h
0015h
0017h
0019h
Contents
Register
D
efault Configuration
I/O Base Address*
Interrupt Number
DMA Channel
DMA Start of Frame
Offset
DMA Frame Count
DMA Byte Count
Address
Mask
Register 3 - RxCFG
Register 5 - RxCTL
Register 7 - TxCFG
Register 9 - TxCMD
Register B - BufCFG
Reserved
Reserved
Reserved
Register 13 - LineCTL
Register 15 - SelfCTL
Register 17 - BusCTL
Register 19 - TestCTL
Register Descriptions
Size (16-bit words)
CIRRUS LOGIC PRODUCT DATASHEET
128
128
256
256
64
64
3.4 Configurations with EEPROM
3.4.1 EEPROM Interface
The interface to the EEPROM consists of the
four signals shown in Table 6.
3.4.2 EEPROM Memory Organization
If an EEPROM is used to store initial configu-
ration information for the CS8900A, the EE-
PROM is organized in one or more blocks of
16-bit words. The first block in EEPROM, re-
ferred to as the Configuration Block, is used to
configure the CS8900A after reset. An exam-
ple of a typical Configuration Block is shown in
Table 7. Additional blocks containing user data
may be stored in the EEPROM. However, the
Configuration Block must always start at ad-
dress 00h and be stored in contiguous memo-
ry locations.
3.4.3 Reset Configuration Block
The first block in EEPROM, referred to as the
Reset Configuration Block, is used to automat-
ically program the CS8900A with an initial con-
figuration after a reset. Additional user data
may also be stored in the EEPROM if space is
available. The additional data are stored as
16-bit words and can occupy any EEPROM
address space beginning immediately after
the end of the Reset Configuration Block up to
address 7Fh, depending on EEPROM size.
This additional data can only be accessed
through software control (refer to Section 3.5
on page 25 for more information on accessing
CS8900A Pin
EESK (PIN 4) 1 MHz EEPROM
EEDO (Pin 5)
EECS (Pin 3)
EEDI (Pin 6)
(Pin #)
Table 6. EEPROM Interface
EEPROM Chip Select
Serial Clock output
EEPROM Data Out
(data to EEPROM)
EEPROM Data in
(data from EEPROM)
CS8900A Function
Chip Select
EEPROM
Data Out
Data In
Clock
Pin
21