CS8900A-IQ3ZR Cirrus Logic Inc, CS8900A-IQ3ZR Datasheet - Page 88
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CS8900A-IQ3ZR
Manufacturer Part Number
CS8900A-IQ3ZR
Description
Ethernet ICs IC 10Mbps Ethernet Controller 3.3V
Manufacturer
Cirrus Logic Inc
Datasheet
1.CS8900A-CQZ.pdf
(138 pages)
Specifications of CS8900A-IQ3ZR
Ethernet Connection Type
10Base- 2, 10Base- 5, 10Base- F, 10Base- T
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Standard Supported
IEEE 802.3
Data Rate
10 Mbps
Maximum Operating Temperature
+ 85 C
Package / Case
LQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS8900A-IQ3ZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
The IAHashA, MulticastA, IndividualA, and
BroadcastA bits are used independently. As a
result, many DA filter combinations are possi-
ble. For example, if MulticastA and IndividualA
are set, then all frames that are either Multicast
It may become necessary for the host to
change the Destination Address (DA) filter cri-
teria without resetting the CS8900A. This can
be done as follows:
1) Clear SerRxON (Register 13, LineCTL, Bit
2) Modify the DA filter bits (B, A, 9, 7, and 6)
3) Set SerRxON to re-enable the receiver.
Because the receiver has been disabled, the
CS8900A will ignore frames while the host is
changing the DA filter.
5.2.12 Hash Filter
The hash filter is used to help determine which
Multicast frames and which Individual Address
frames should be accepted by the CS8900A.
88
IAHashA
6) to prevent any additional receive frames
while the filter is being changed.
in the RxCTL register. Modify the Logical
Address Filter at PacketPage base +
0150h, if necessary. Modify the Individual
Address at PacketPage base + 0158h, if
necessary.
X
0
1
0
0
PromiscuousA MulticastA
0
0
0
0
1
CIRRUS LOGIC PRODUCT DATASHEET
X
0
0
1
0
Table 25. DA Filtering Options
IndividualA
X
1
0
0
0
or Individual Address frames are accepted.
The PromiscuousA bit, when set, overrides the
other four DA bits, and allows all valid frames
to be accepted. Table 25 summarizes the con-
figuration options available for DA filtering.
5.2.12.1 Hash Filter Operation
See Figure 23. The DA of the incoming frame
is passed through the CRC logic, generating a
32-bit CRC value. The six most-significant bits
of the CRC are latched into the 6-bit hash reg-
ister (HR). The contents of the HR are passed
through a 6-to-64-bit decoder, asserting one of
the decoder's outputs. The asserted output is
compared with a corresponding bit in the 64-
bit Logical Address Filter, located at Packet-
Page base + 0150h. If the decoder output and
the Logical Address Filter bit match, the frame
passes the hash filter and the Hashed bit
(Register 4, RxEvent, Bit 9) is set. If the two do
not match, the frame fails the filter and the
Hashed bit is clear.
Whenever the hash filter is passed by a "good"
frame, the RxOK bit (Register 4, RxEvent, Bit
8) is set and the bits in the HR are mapped to
the Hash Table Index bits (Register 4, Rx-
Event, Bits A through F).
BroadcastA
X
0
0
0
1
Crystal LAN™ Ethernet Controller
Individual Address frames with
DA matching the IA at Packet-
Page base + 0158h
Individual Address frames with
DA that pass the hash filter
(DA[0] must be “0”)
Multicast frames with DA that
pass the hash filter (DA[0] must
be “1”)
Broadcast frames
All frames
Frames Accepted
CS8900A
DS271F5