MT48LC2M32B2TG-7 IT:G Micron Technology Inc, MT48LC2M32B2TG-7 IT:G Datasheet - Page 46
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MT48LC2M32B2TG-7 IT:G
Manufacturer Part Number
MT48LC2M32B2TG-7 IT:G
Description
DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II Tray
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC2M32B2TG-7_ITG.pdf
(69 pages)
Specifications of MT48LC2M32B2TG-7 IT:G
Density
64 Mb
Maximum Clock Rate
143 MHz
Package
86TSOP-II
Address Bus Width
13 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
17|8|5.5 ns
Operating Temperature
-40 to 85 °C
Organization
2Mx32
Address Bus
13b
Access Time (max)
17/8/5.5ns
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
160mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Not Compliant
Table 14:
Table 15:
Table 16:
Table 17:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
Parameter/Condition
Parameter/Condition
Parameter
Parameter
Supply voltage
Input high voltage: Logic 1; All inputs
Input low voltage: Logic 0; All inputs
Input leakage current:
Any input 0V ≤ V
Output leakage current: DQs are disabled; 0V ≤ V
Output levels:
Output high voltage (I
Output low voltage (I
Operating current: Active mode; Burst = 2; READ or WRITE;
≥
Standby current: Power-down mode; All banks idle; CKE = LOW
Standby current: Active mode; CKE = HIGH; CS# = HIGH; All
banks active after
Operating current: Burst mode; Continuous burst; READ or
WRITE; All banks active; CL = 3
Auto refresh current:
CL = 3; CKE, CS# = HIGH
Self refresh current: CKE ≤ 0.2V
Input capacitance: CLK
Input capacitance: All other input-only pins
Input/output capacitance: DQs
Input capacitance: CLK
Input capacitance: All other input-only balls
Input/output capacitance: DQs
t
RC (MIN); CL = 3
DC Electrical Characteristics and Operating Conditions
Notes 1, 6, 27 apply to entire table; notes appear on pages 49 and 50; V
I
Notes 1, 6, 11, 13, 27 apply to entire table; notes appear on pages 49 and 50; V
TSOP Capacitance
Note 2 applies to entire table; notes appear on pages 49 and 50
VFBGA Capacitance
Note 2 applies to entire table; notes appear on pages 49 and 50
DD
IN
Specifications and Conditions
t
RCD met; No accesses in progress
≤ V
OUT
DD
OUT
(All other pins not under test = 0V)
= 4mA)
= –4mA)
t
RFC =
OUT
t
RFC (MIN)
≤ V
DD
Q
t
46
RC
V
Symbol
Symbol
DD
I
I
I
I
I
I
DD
DD
DD
DD
DD
DD
V
V
V
, V
I
V
OZ
OH
I
OL
IH
IL
I
1
2
3
4
5
6
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
Q
200
280
225
80
-5
2
2
Symbol
Symbol
Min
–0.3
C
C
2.4
C
C
C
C
–5
–5
3
2
–
I
I
IO
I
I
IO
1
2
1
2
190
260
225
-55
70
2
2
DD
Max
, V
Electrical Specifications
V
DD
DD
Max
150
180
225
Min
Min
DD
60
3.6
0.8
0.4
-6
2.5
2.5
4.0
2.5
2.5
4.0
Q = +3.3V ±0.3V
2
2
5
5
–
+ 0.3
©2001 Micron Technology, Inc. All rights reserved.
, V
64Mb: x32 SDRAM
DD
130
160
225
Q = +3.3V ±0.3V
50
-7
2
2
Units
Max
Max
4.0
4.0
6.5
4.0
4.0
6.5
µA
µA
V
V
V
V
V
Units
mA
mA
mA
mA
mA
mA
Notes
Units
Units
Notes
18, 19,
19, 26
19, 26
19, 26
22
22
3, 18,
3, 12,
3, 18,
3, 12,
pF
pF
pF
pF
pF
pF
26
4