M25P20-VMN6PB NUMONYX, M25P20-VMN6PB Datasheet - Page 17

• Manufacturer Part Number: M25P20-VMN6PB
• Description: Flash Mem Serial-SPI 3.3V 2M-Bit 256K x 8 8ns 8-Pin SO N Tray
• Manufacturer: NUMONYX

Specifications of M25P20-VMN6PB

• Package: 8SO N
• Cell Type: NOR
• Density: 2 Mb
• Architecture: Sectored
• Block Organization: Symmetrical
• Typical Operating Supply Voltage: 3.3 V
• Sector Size: 64KByte x 4
• Timing Type: Synchronous
• Operating Temperature: -40 to 85 °C
• Interface Type: Serial-SPI

6.1
Table 4.
1. The Read Identification (RDID) instruction is available only in products with Process Technology code X
Write Enable (WREN)
The Write Enable (WREN) instruction
The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector
Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 7.
FAST_READ
Instruction
RDID
and 4 (see Application Note AN1995).
WREN
WRSR
RDSR
READ
WRDI
RES
PP
SE
BE
DP
(1)
Instruction Set
Write Enable (WREN) Instruction Sequence
Write Disable
Read Identification
Read Status Register
Write Status Register
Read Data Bytes
Read Data Bytes at Higher
Speed
Page Program
Bulk Erase
Deep Power-down
Release from Deep Power-
down, and Read Electronic
Signature
Release from Deep Power-
down
Write Enable
Sector Erase
S
C
D
Q
Description
High Impedance
0
(Figure
1
2
One-byte Instruction
Instruction
0000 0110
0000 0100
0000 0101
0000 0001
0000 0011
0000 1011
0000 0010
1011 1001
1010 1011
1101 1000
3
1001 1111
1100 0111
7) sets the Write Enable Latch (WEL) bit.
4
Code
5
6
7
D8h
C7h
ABh
9Fh
01h
0Bh
B9h
06h
04h
05h
03h
02h
Address
AI02281E
Bytes
0
0
0
0
0
3
3
3
3
0
0
0
0
Dummy
Bytes
0
0
0
0
0
0
1
0
0
0
0
3
0
1 to 256
Bytes
1 to ∞
1 to ∞
1 to ∞
1 to ∞
1 to 3
Data
0
0
1
0
0
0
0
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