LFEC10E-3FN256C LATTICE SEMICONDUCTOR, LFEC10E-3FN256C Datasheet - Page 37

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LFEC10E-3FN256C

Manufacturer Part Number
LFEC10E-3FN256C
Description
FPGA LatticeEC Family 10200 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet

Specifications of LFEC10E-3FN256C

Package
256FBGA
Family Name
LatticeEC
Device Logic Units
10200
Maximum Internal Frequency
340 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
195
Ram Bits
282624
In System Programmability
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFEC10E-3FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Absolute Maximum Ratings
1. Stress above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation of the
2. Compliance with the Lattice Thermal Management document is required.
3. All voltages referenced to GND.
4. Overshoot and undershoot of -2V to (V
Hot Socketing Specifications
1. Insensitive to sequence of V
2. 0 ≤ V
3. I
4. LVCMOS and LVTTL only.
February 2008
Recommended Operating Conditions
© 2008 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
www.latticesemi.com
Supply Voltage V
Supply Voltage V
Supply Voltage V
Output Supply Voltage V
Dedicated Input Voltage Applied
I/O Tristate Voltage Applied
Storage Temperature (Ambient) . . . . . . . . . -65 to 150°C
Junction Temp. (Tj). . . . . . . . . . . . . . . . . . . . . . . . +125°C
Top and Bottom General Purpose sysI/Os (Banks 0, 1, 4 and 5), JTAG and Dedicated sysCONFIG Pins
I
Left and Right General Purpose sysI/Os (Banks 2, 3, 6 and 7)
I
V
V
V
V
V
t
t
1. If V
2. See recommended voltages by I/O standard in subsequent table.
3. V
DK_TB
DK_LR
JCOM
JIND
CC
CCAUX
CCPLL
CCIO
CCJ
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Symbol
DK
Symbol
nected to the same power supply as V
ing between 0.8V and 1.8V.
CCAUX
1
is additive to I
CCIO
1, 2
CC
3
≤ V
or V
ramp rate must not exceed 3mV/µs for commercial and 0.6 mV/µs for industrial device operations during power up when transition-
CC
CCJ
Input or I/O Leakage Current
Input or I/O Leakage Current
Core Supply Voltage
Auxiliary Supply Voltage
PLL Supply Voltage for ECP/EC33
I/O Driver Supply Voltage
Supply Voltage for IEEE 1149.1 Test Access Port
Junction Commercial Operation
Junction Industrial Operation
(MAX), 0 ≤ V
is set to 1.2V, they must be connected to the same power supply as V
PU,
CC
CCAUX
CCJ
I
PW
. . . . . . . . . . . . . . . . . . . -0.5 to 1.32V
. . . . . . . . . . . . . . . . . . -0.5 to 3.75V
or I
. . . . . . . . . . . . . . . . -0.5 to 3.75V
CCIO
CCIO
CC,
Parameter
BH
.
V
4
≤ V
CCAUX
. . . . . . . . . . . . -0.5 to 3.75V
. . . . . . . . . . . -0.5 to 3.75V
CCIO
4
IHMAX
CCAUX
. . . . . . . . -0.5 to 4.25V
and V
(MAX) or 0 ≤ V
+ 2) volts is permitted for a duration of <20ns.
.
CCIO
1, 2, 3
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
. However, assumes monotonic rise/fall rates for V
1, 2, 3, 4
Parameter
CCAUX
0 ≤ V
V
V
IN
IN
≤ V
> V
IN
≤ V
CCIO
CCIO
≤ V
CCAUX
3-1
Condition
IH
(MAX.)
(MAX).
CC.
If V
CCIO
Min.
or V
CC,
CCJ
V
CCAUX
3.135
1.140
1.140
Min.
1.14
1.14
Typ.
is set to 3.3V, they must be con-
-40
35
0
and V
DC and Switching_01.9
+/-1000
+/-1000
CCIO.
3.465
3.465
3.465
Max.
1.26
1.26
Max.
100
85
Data Sheet
Units
Units
mA
°C
°C
µA
µA
V
V
V
V
V

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