TXC-03305AIPQ Transwitch Corporation, TXC-03305AIPQ Datasheet - Page 19

• Manufacturer Part Number: TXC-03305AIPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03305AIPQ

• Lead Free Status / RoHS Status: Not Compliant

RECEIVE C-BIT INTERFACE
Symbol
CDCCR
CFMR
CCKR
CDR
Lead No.
BGA
N5
P5
T5
T4
Lead No.
PQFP
65
66
64
61
I/O/P
O
O
O
O
TTL8mA Receive C-Bit Clock: A gapped clock signal is pro-
TTL8mA Receive C-Bit Data: The following C-bits are pro-
TTL8mA Receive C-Bit Framing Pulse: This positive fram-
TTL8mA Receive Data Link Indication: A positive pulse
Type
DATA SHEET
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vided for clocking out the selected receive C-bit
data. Data (CDR) is clocked out on the rising edges
of CCKR.
vided at this interface: C2, C3, C4, C5, C6, C13,
C14, C15, C16, C17, C18, C19, C20, and C21.
ing pulse occurs prior to the C2 bit.
that identifies the location of the three data link C-
bits (C13, C14, and C15). The receive C-bit clock
(CCKR) may be and-gated with this signal to pro-
vide a gapped data link clock signal for loading the
three C-bits from the C-bit data (CDR) into external
circuitry, such as in M13E device applications. This
signal is not needed if the internal HDLC controller
is used since the C13, C14, and C15 C-bits are
then processed internally. This signal is enabled by
placing a high on the DLEN input signal lead.
Name/Function
Ed. 4, September 2000
TXC-03305
TXC-03305-MB
M13X