HFIXF1110CC Intel, HFIXF1110CC Datasheet - Page 174

• Manufacturer Part Number: HFIXF1110CC
• Manufacturer: Intel

Specifications of HFIXF1110CC

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

Intel
07-Oct-2005
174
®
Table 103. SPI4-2 RX Calendar ($ 0x702)
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Register Description: SPI4-2 RX interface start-up parameters for FIFO status calendar
operation.
1. R = Read Only; CoR = Clear on Read; W = Write only; R/W = Read/Write
31:30
27:21
19:16
15:14
11:8
Bit
7:4
3:0
29
28
20
13
12
Intel
RX Train Test
Modes
RSCLK_invert
TSCLK_invert
Reserved
DIP2_Error
DIP-2_Thr
Reserved
RX SPI4-2 Sync
TX SPI4 Sync
Loss_of_Sync
Reserved
Reserved
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Name
Order Number: 250210, Revision: 009
00 = Normal mode
01 = Do not enter training based on a
repeating “11” pattern on RSTAT[1:0]
1x = Train continuously
0 = The FIFO status is captured on the
1 = The FIFO status is captured on the
NOTE: For proper operation, set this bit to
0 = The FIFO status is launched on the
1 = The FIFO status is launched on the
Reserved
Set based on an incorrect RX DIP2 result.
This bit is cleared upon a read
Defines how many consecutive correct DIP-
2s are required to disable sending of training
sequences on the RX SPI4-2.
Reserved
0 = RX SPI4 In Training (RDAT = training)
RX SPI4 Out Of Training (RDAT = idles)
0 = TX SPI4-2 Calendar is in constant
The TX SPI4-2 has received the valid
training patterns on TDAT and is now
sending a 10 port Calendar on TSAT with
valid FIFO information
Loss-of-Sync is a parameter specifying the
number of consecutive framing calendar
cycles required to indicate a loss of
synchronization and restart training
sequences.
Reserved
Write as 0, ignore on Read.
rising edge of the RSCLK as per the
SPI4-2 specification
falling edge of RSCLK
rising edge of the TSCLK as per the
SPI4-2 specification
falling edge of TSCLK
Framing
the desired setting before the
RSCLK is applied to the device.
Description
Type
CoR
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
1
0x00010300
Default
0x000
Value
Datasheet
0x0
0x0
0x1
0x3
0x0
0x0
00
0
0
0
0