GDLXT9785MBC.D0-854707 Cortina Systems Inc, GDLXT9785MBC.D0-854707 Datasheet - Page 155

• Manufacturer Part Number: GDLXT9785MBC.D0-854707
• Manufacturer: Cortina Systems Inc

Specifications of GDLXT9785MBC.D0-854707

• Lead Free Status / RoHS Status: Not Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Figure 32
4.12.4
4.12.5
4.12.6
Cortina Systems
RMII Programmable Out-of-Band Signaling
The LXT9785/LXT9785E includes an IEEE 1149.1 boundary scan test port for board level
testing. All digital input, output, and input/output pins are accessible.
Boundary Scan Interface
This interface consists of five pins (TMS, TDI, TDO, TCK and TRST_L). It includes a state
machine, data register array, and instruction register. The TMS and TDI pins are internally
pulled up and the TCK pin is internally pulled down. TDO does not have an internal pull-up
or pull-down.
State Machine
The TAP controller is a 16-state machine driven by the TCK and TMS pins. Upon reset,
the TEST_LOGIC_RESET state is entered. The state machine is also reset when TMS
and TDI are High for five TCK periods.
Instruction Register
The IDCODE instruction is always invoked after the state machine resets. The decode
logic ensures the correct data flow to the Data registers according to the current
instruction. Valid instructions are listed in
®
REFCLK
1. When network activity is detected, the LXT9785/LXT9785E asserts CRS_DV asynchronously with
2. After CRS_DV is asserted, the LXT9785/LXT9785E zero-stuffs the RxData bits until the received data has
3. When network activity ceases, the LXT9785/LXT9785E de-asserts CRS_DV synchronously with respect
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
CRS_DV
RXD(1)
RXD(0)
respect to REFCLK.
been processed through the FIFO.
to REFCLK. CRS_DV toggles until all data in the FIFO has been processed through the RMII. Once the
FIFO is empty, LXT9785/LXT9785E drives the status bits selected by the Out-of-Band Signaling Register
(refer to
sta tus 1
sta tus 0
Table 99, RMII Out-of-Band Signaling Register (Address 25, Hex 19), on page
status 1
status 0
0s
0s
data
data
data
data
Table
data
data
50.
data
data
status 1
status 0
status 1
status 0
4.12 Monitoring Operations
status 1
status 0
206) on the
status 1
status 0
Page 155
status 1
status 0