GDLXT9785MBC.D0-854707 Cortina Systems Inc, GDLXT9785MBC.D0-854707 Datasheet - Page 191

• Manufacturer Part Number: GDLXT9785MBC.D0-854707
• Manufacturer: Cortina Systems Inc

Specifications of GDLXT9785MBC.D0-854707

• Lead Free Status / RoHS Status: Not Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
7.0
Table 83
Cortina Systems
Register Definitions
The LXT9785/LXT9785E register set includes multiple 16-bit registers and 18 registers
per port.
(Address 0), on page 192
Hex 1D), on page 209
page 210
Base registers (0 through 8) are defined in accordance with the “Reconciliation Sublayer
and Media Independent Interface” and “Physical Layer Link Signaling for 10/100 Mbps
Auto-Negotiation” sections of the IEEE 802.3 standard.
Additional registers (16 through 21, 25, 27, and 29) are defined in accordance with the
IEEE 802.3 standard for adding unique device functions.
The BGA15 package on some registers has different default values. Some LXT9785/
LXT9785E features are not available on the BGA15 package. These differences are
called out in the register description and in the table notes in individual register tables.
Register Set
®
Address
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
22-24
10
15
16
17
18
19
20
21
25
26
27
0
1
2
3
4
5
6
7
8
9
Table 83
provides a consolidated memory map of all registers.
Control Register (Address 0)
Status Register (Address 1)
PHY Identification Register 1 (Address 2)
PHY Identification Register 2 (Address 3)
Auto-Negotiation Advertisement Register (Address 4)
Auto-Negotiation Link Partner Base Page Ability Register
(Address 5)
Auto-Negotiation Expansion Register (Address 6)
Auto-Negotiation Next Page Transmit Register (Address 7)
Auto-Negotiation Link Partner Next Page Receive Register
(Address 8)
1000BASE-T/100BASE-T2 Control
1000BASE-T/100BASE-T2 Status
Extended Status
Port Configuration Register (Address 16, Hex 10)
Quick Status Register (Address 17, Hex 11)
Interrupt Enable Register (Address 18, Hex 12)
Interrupt Status Register (Address 19, Hex 13)
LED Configuration Register (Address 20, Hex 14)
Receive Error Count Register (Address 21, Hex 15)
Reserved
RMII Out-of-Band Signaling Register (Address 25, Hex 19)
Reserved
Trim Enable Register (Address 27, Hex 1B)
Register Name
presents a complete register listing.
define individual registers and
through
Table 101, Cable Diagnostics Register (Address 29,
Table 102, Register Bit Map, on
Table 84, Control Register
Bit Assignments
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
Not Implemented
Not Implemented
Not Implemented
Refer to
Refer to
Refer to
Refer to
Refer to
Refer to
N/A
Refer to
N/A
Refer to
7.0 Register Definitions
Table 84 on page 192
Table 85 on page 193
Table 86 on page 194
Table 87 on page 194
Table 88 on page 195
Table 89 on page 196
Table 90 on page 197
Table 91 on page 198
Table 92 on page 198
Table 93 on page 199
Table 94 on page 200
Table 95 on page 201
Table 96 on page 203
Table 97 on page 204
Table 98 on page 205
Table 99 on page 206
Table 100 on page 207
Page 191