ICS1892YT IDT, Integrated Device Technology Inc, ICS1892YT Datasheet - Page 109

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ICS1892YT

Manufacturer Part Number
ICS1892YT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of ICS1892YT

Lead Free Status / RoHS Status
Not Compliant
9.2.4 MAC/Repeater Interface Pins
9.2.4.1 MAC/Repeater Interface Pins for Media Independent Interface
ICS1892, Rev. D, 2/26/01
This section lists pin descriptions for each of the following interfaces
Table 9-6
Table 9-6. MAC/Repeater Interface Pins: Media Independent Interface (MII)
COL
CRS
MDC
Name
Section 9.2.4.1, “MAC/Repeater Interface Pins for Media Independent Interface”
Section 9.2.4.2, “MAC/Repeater Interface Pins for 100M Symbol Interface”
Section 9.2.4.3, “MAC/Repeater Interface Pins for 10M Serial Interface”
Section 9.2.4.4, “MAC/Repeater Interface Pins for Link Pulse Interface”
Pin
ICS1892
lists the MAC/Repeater Interface pin descriptions for the MII.
Number
Pin
49
50
31
Output
Output
Type
Input
Pin
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
Collision (Detect).
The ICS1892 asserts a signal on the COL pin when the ICS1892 detects
receive activity while transmitting (that is, while the TXEN signal is
asserted by the MAC/repeater, that is, when transmitting). When the
mode is:
Carrier Sense.
Management Data Clock.
The ICS1892 uses the signal on the MDC pin to synchronize the transfer
of management information between the ICS1892 and the Station
Management Entity (STA), using the serial MDIO data line. The MDC
signal is sourced by the STA.
Note:
Note: The signal on the CRS pin is not synchronous to either RXCLK or
1. The signal on the COL pin is not synchronous to either RXCLK or
2. In full-duplex mode, the COL signal is disabled and always remains
3. The COL signal is asserted as part of the signal quality error (SQE)
10Base-T, the ICS1892 detects receive activity by monitoring the
un-squelched MDI receive signal.
100Base-TX, the ICS1892 detects receive activity when there are two
non-contiguous zeros in any 10-bit symbol derived from the MDI
receive data stream.
In half-duplex mode, the ICS1892 asserts a signal on the CRS pin
when the ICS1892 detects either receive or transmit activity.
In full-duplex mode and Repeater mode, the ICS1892 asserts a signal
on the CRS pin only when the ICS1892 detects receive activity.
TXCLK.
low.
test. This assertion can be suppressed with the SQE Test Inhibit bit (bit
18.2).
TXCLK.
109
Chapter 9 Pin Diagram, Listings, and Descriptions
Pin Description
February 26, 2001

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