FWLXT9784BE.A3 Cortina Systems Inc, FWLXT9784BE.A3 Datasheet - Page 32

• Manufacturer Part Number: FWLXT9784BE.A3
• Manufacturer: Cortina Systems Inc

Specifications of FWLXT9784BE.A3

• Lead Free Status / RoHS Status: Not Compliant

LXT9784 — Low-Power Octal PHY
2.3.1.8
32
CRS
MCLK
CRSDV_n
RXD1_n
RXD0_n
MCLK
CRSDV_n
RXD1_n
RXD0_n
X
X
Figure 5. RMII Data Reception
Figure 6. False Carrier Detect
Table 12. SMII RXD_[7:0] Contents
RX_DV
0
0
0
0
O
1
100BASE-TX Receive Error Detection and Reporting
In 100BASE-TX mode, the PHYs detect errors in the receive data in a number of ways. Any of the
following conditions is considered an error:
When any of the above error conditions occurs, the PHY immediately indicates a receive error for
reception. In RMII mode the PHY asserts RXERn, and in SMII mode the PHY asserts the RXD_0
status bit.
0
0
0
0
•
•
•
If the SSD ("JK") symbol is not fully detected after idle
If an invalid symbol is detected at the 4B/5B decoder
If IDLE is detected in the middle of a frame (before "TR" symbol pair are detected)
previous frame
0
0
receive error
0
status, from
0
RXD0
0
0
0
0
False Carrier detected
0
0
0
0
0 = 10Mbps
1=100Mbps
1
0
0
0
Speed
RXD1
0
0
0
1
0
1
1
0
Preamble
0=down
Duplex
One Data Byte (two MII data nibbles)
RXD2
1 = up
0
1
1
0
0
1
1
0
0=down
1 = up
RXD3
Link
0
1
0
1
SFD
0
1
1
0
0
1=error
Jabber
0 =OK
RXD4
1
1
1
0
x
x
Upper Nibble
1
0
0 = invalid
1 = valid
RXD5
x
x
1
0
Data
x
x
0
1
False Carrier
x
x
1
0
1
Detect
RXD6
x
x
0
1
Datasheet
0
0
0
0
RXD7
1