FWLXT9784BE.A3 Cortina Systems Inc, FWLXT9784BE.A3 Datasheet - Page 65

• Manufacturer Part Number: FWLXT9784BE.A3
• Manufacturer: Cortina Systems Inc

Specifications of FWLXT9784BE.A3

• Lead Free Status / RoHS Status: Not Compliant

Datasheet
17.9
17.8
17.7
17.6
17.5
17.4
17.3
17.2
17.1
17.0
18.15:2
18.1
18.0
19[15:0]
1. Refer to
1. Refer to
1. Refer to
Bit(s)
Bit(s)
Bit(s)
Table 51. Register 17 (11 Hex) Special Control (Continued)
Table 52. Register 18 (12 Hex) PHY Interrupt Register
Table 53. Reg 19 (13 Hex) 100 BASE-TX RCV False Carrier Counter
Reserved
Interrupt Enable
Link Status
Interrupt
Carrier Sense
Disable
Reserved
Auto-Negotiation
Loopback
MDI Tri-state
Force Polarity
Auto Polarity Disable
SQE Disable
Extended Squelch
Link Integrity Disable
Jabber Function
Disable
Table 42 on page 60
Table 42 on page 60
False Carrier
Sense
Table 42 on page 60
Name
Name
Name
Constant “0”.
Enables the assertion of a specific PHY Interrupt line. However, bit 0 is not masked,
and the interrupt bit will remain visible.
1 = enable the assertion of the interrupt line.
default 0 = disable the interrupt line.
Reflects the PHY link integrity changing. The bit is self-cleared after any read cycle.
1 = a change on PHY link status was detected.
A 16 bit counter that increments for each false carrier event (bad SSD). The counter
stops when full (and does not roll over.) Self clears on read.
for Type definitions.
for Type definitions.
for Type definitions.
Controls the RX100 CRS disable function
1 = CRS disable.
default 0 = CRS enable.
Must be set to zero during write
1 = Auto-Negotiation Loopback.
default 0 = Auto-Negotiation normal mode.
1 = MDI Tri-state (transmit driver tri-states)
default 0 = Normal operation
1 = Reversed polarity
default 0 = Normal polarity operation.
1 = Auto Polarity disabled.
default 0 = Auto Polarity enabled.
1 = 10BASE-T squelch test disabled.
default 0 = Normal squelch operation
Extended Squelch control.
1 = 10BASE-T extended squelch control enabled.
0 = 10BASE-T extended squelch control disabled.
1 = Link disabled.
default 0 = Normal Link Integrity operation.
1 = Jabber disabled.
default 0 = Normal Jabber operation.
Description
Description
Description
Low-Power Octal PHY — LXT9784
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
RO
SC
SC
P
1
1
1
65