HBLXT9785HC.A4 Intel, HBLXT9785HC.A4 Datasheet - Page 191
HBLXT9785HC.A4
Manufacturer Part Number
HBLXT9785HC.A4
Description
Manufacturer
Intel
Datasheet
1.HBLXT9785HC.A4.pdf
(234 pages)
Specifications of HBLXT9785HC.A4
Lead Free Status / RoHS Status
Not Compliant
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Datasheet
Document Number: 249241
Revision Number: 010
Revision Date: 30-May-2006
Figure 52. RMII - 100BASE-TX Transmit Timing
Table 73. RMII - 100BASE-TX Transmit Timing Parameters
TxData<1:0>/TxEN setup to REFCLK rising
edge
TxData<1:0>/TxEN hold from REFCLK rising
edge
TxEN sampled to TPFO out (Tx latency)
NOTE: The table latency values are derived with the hardware configuration pins FIFOSEL[1:0] set at a
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. “BT” signifies bit times at the line rate (that is, BT = 100 ns if using 10BASE-T, BT = 10 ns if using
testing.
100BASE-TX or 100BASE-FX).
default configuration of 00 (32 bits of initial fill).
TxData(1:0)
REFCLK
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
TPFO
TxEN
Parameter
t
1
t
3
Sym
t1
t2
t3
t
1
Min
4
2
–
t
2
Typ
12
–
–
1
Max
17
–
–
Units
BT
ns
ns
2
t
2
Conditions
Test
–
–
–
191
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