DP83848CVVX National Semiconductor, DP83848CVVX Datasheet - Page 19

• Manufacturer Part Number: DP83848CVVX
• Manufacturer: National Semiconductor

Specifications of DP83848CVVX

• Lead Free Status / RoHS Status: Compliant

2.4 LED Interface
The DP83848C supports three configurable Light Emitting
Diode (LED) pins. The device supports three LED configu-
rations: Link, Speed, Activity and Collision. Function are
The LED_LINK pin in Mode 1 indicates the link status of
the port. In 100BASE-T mode, link is established as a
result of input receive amplitude compliant with the TP-
PMD specifications which will result in internal generation
of signal detect. A 10 Mb/s Link is established as a result of
the reception of at least seven consecutive normal Link
Pulses or the reception of a valid 10BASE-T packet. This
will cause the assertion of LED_LINK. LED_LINK will deas-
sert in accordance with the Link Loss Timer as specified in
the IEEE 802.3 specification.
The LED_LINK pin in Mode 1 will be OFF when no LINK is
present.
The LED_LINK pin in Mode 2 and Mode 3 will be ON to
indicate Link is good and BLINK to indicate activity is
present on either transmit or receive activity.
The LED_SPEED pin indicates 10 or 100 Mb/s data rate of
the port. The standard CMOS driver goes high when oper-
ating in 100 Mb/s operation. The functionality of this LED is
independent of mode selected.
The LED_ACT/COL pin in Mode 1 indicates the presence
of either transmit or receive activity. The LED will be ON for
Activity and OFF for No Activity. In Mode 2, this pin indi-
cates the Collision status of the port. The LED will be ON
for Collision and OFF for No Collision.
The LED_ACT/COL pin in Mode 3 indicates the presence
of Duplex status for 10 Mb/s or 100 Mb/s operation. The
LED will be ON for Full Duplex and OFF for Half Duplex.
In 10 Mb/s half duplex mode, the collision LED is based on
the COL signal.
Since these LED pins are also used as strap options, the
polarity of the LED is dependent on whether the pin is
pulled up or down.
2.4.1 LEDs
Since the Auto-Negotiation (AN) strap options share the
LED output pins, the external components required for
strapping and LED usage must be considered in order to
avoid contention.
Mode
1
2
3
LED_CFG[1]
don’t care
(bit 6)
0
1
LED_CFG[0]
or (pin40)
(bit 5)
1
0
0
ON for Good Link
OFF for No Link
ON for Good Link
BLINK for Activity
ON for Good Link
BLINK for Activity
Table 3. LED Mode Select
LED_LINK
19
multiplexed among the LEDs. The PHY Control Register
(PHYCR) for the LEDs can also be selected through
address 19h, bits [6:5].
See Table 3 for LED Mode selection.
Specifically, when the LED outputs are used to drive LEDs
directly, the active state of each output driver is dependent
on the logic level sampled by the corresponding AN input
upon power-up/reset. For example, if a given AN input is
resistively pulled low then the corresponding output will be
configured as an active high driver. Conversely, if a given
AN input is resistively pulled high, then the corresponding
output will be configured as an active low driver.
Refer to Figure 3 for an example of AN connections to
external components. In this example, the AN strapping
results in Auto-Negotiation with 10/100 Half/Full-Duplex
advertised.
The adaptive nature of the LED outputs helps to simplify
potential implementation issues of these dual purpose pins.
Figure 3. AN Strapping and LED Loading Example
ON in 100 Mb/s
OFF in 10 Mb/s
ON in 100 Mb/s
OFF in 10 Mb/s
ON in 100 Mb/s
OFF in 10 Mb/s
LED_SPEED
AN_EN = 1
AN1 = 1
ON for Activity
OFF for No Activity
ON for Collision
OFF for No Collision
ON for Full Duplex
OFF for Half Duplex
LED_ACT/COL
AN0 = 1
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