82V1074PFG IDT, Integrated Device Technology Inc, 82V1074PFG Datasheet - Page 29

• Manufacturer Part Number: 82V1074PFG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V1074PFG

• Number Of Channels: 4
• On-hook Transmission: Yes
• Polarity Reversal: Yes
• On-chip Ring Relay Driver: Yes
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TQFP
• Operating Temperature Classification: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Operating Current: 95mA
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Lead Free Status / RoHS Status: Compliant

3.5.2
of the loop is used as ground-key criterion. The RSLIC senses the
longitudinal current and transfers the scaled longitudinal voltage
information to the CODEC via VL pin. An analog comparator for ground-
key detection compares this voltage with a fixed threshold (11.8 mA). If
the threshold is exceeded, the bit GK[n] (n = 0, 1, 2 or 3) in register
GREG26 will be set to 1 to indicate that ground-key is detected in
Channel n+1. An interrupt will occur if any bit of GK[3:0] changing from 0
to 1. The GK[3:0] bits can be masked by the GK_M bit in register
LREG18.
in register LREG21. Each change of the GK_POL bit generates an
interrupt. The GK_POL bit can be masked by the GKP_M bit in register
LREG18.
Table - 6 Registers Used for Ground-key Detection
3.6
the voltage on the Tip and Ring lines. The actual polarity of this voltage
is reversed by setting the REV_POL bit in register LREG19 to 1.
Ground-key Indication
Mask bit for GK[3:0] bits
Ground-key Polarity
Mask bit for GK_P bit
Debounce Interval Selection
RSLIC & CODEC CHIPSET
In applications of using ground-key signaling, the longitudinal current
The polarity of the longitudinal current is indicated by the GK_POL bit
The RSLIC-CODEC supports metering by reversing the polarity of
GROUND-KEY DETECTION
METERING BY POLARITY REVERSAL
Parameter
Bits GK[3:0] in GREG26
Bit GK_M in LREG18
Bit GK_P in LREG21
Bit GKP_M in LREG18
Bits DB[3:0] in LREG11
Register Bits
29
GK[n] = 0: no longitudinal current detected in Channel n+1 (n = 0 to 3);
GK[n] = 1: longitudinal current detected in Channel n+1.
GK_M = 0: each change of the GK[3:0] bits generates an interrupt;
GK_M = 1: changes of the GK[3:0] bit do not generate interrupts.
GK_P = 0: negative ground-key threshold level active;
GK_P = 1: positive ground-key threshold level active.
GKP_M = 0: each change of the GK_P bit generates an interrupt;
GKP_M = 1: changes of the GK_P bit do not generate interrupt.
The interval is programmable from 0.125 ms to 2 ms in steps of 0.125 ms.
impedance, the longitudinal current on the Ring or Tip line is sensed by
the RSLIC and fed to the CODEC through the VL pin for testing.
criterion) is also filtered by the programmable debounce filter used in off-
hook detection. The DC signal with duration less than the denounce time
will be ignored. The debounce interval is programmable by the DB[3:0]
bits in register LREG11. Refer to
non-required ringing. Users can control the transition time (time from
start to end of polarity reversal) by programming the built-in ramp
generator. Refer to
An application example is shown in the following:
• Tip open or Ring open mode
In this case, the Tip line or the Ring line is switched to high
The longitudinal DC signal (which is taken as the ground-key
Table - 6
The voltage polarity is reversed in a smooth way to avoid generating
shows the registers used for ground-key detection.
"Ramp Generator" on page 47
IDT82V1671/IDT82V1671A, IDT82V1074
Notes
Figure - 14
for details.
for further details.