82V1074PFG IDT, Integrated Device Technology Inc, 82V1074PFG Datasheet - Page 7

• Manufacturer Part Number: 82V1074PFG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V1074PFG

• Number Of Channels: 4
• On-hook Transmission: Yes
• Polarity Reversal: Yes
• On-chip Ring Relay Driver: Yes
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TQFP
• Operating Temperature Classification: Industrial
• Pin Count: 100
• Mounting: Surface Mount
• Operating Current: 95mA
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Lead Free Status / RoHS Status: Compliant

RSLIC & CODEC CHIPSET
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Line Circuit Functions Included in the RSLIC-CODEC Chipset ........................................................................................................ 16
DC Feeding Zones ............................................................................................................................................................................ 17
Constant Current Zone...................................................................................................................................................................... 17
Resistive Zone................................................................................................................................................................................... 17
Constant Voltage Zone...................................................................................................................................................................... 18
DC Feeding Characteristics Configuration ........................................................................................................................................ 18
DC Feeding Configuration Example for Short Loop Applications...................................................................................................... 18
Signal Paths for AC Transmission..................................................................................................................................................... 20
Voice Signal Path of the CODEC ...................................................................................................................................................... 20
Nyquist Diagram................................................................................................................................................................................ 21
Internal Balanced Ringing ................................................................................................................................................................. 23
External Ringing Synchronization ..................................................................................................................................................... 25
Hysteresis for Off-Hook Detection..................................................................................................................................................... 27
Debounce Filter for Off-hook/Ground-key Detection ......................................................................................................................... 28
FSK Signal Transmission Sequence................................................................................................................................................. 31
Recommended Programming Flow Chart for FSK Generation ......................................................................................................... 33
UTD Functional Diagram................................................................................................................................................................... 34
Example of UTD Recognition Timing ................................................................................................................................................ 35
Example of UTD Tone End Detection Timing ................................................................................................................................... 35
Conference Block Diagram ............................................................................................................................................................... 37
Level Meter Block Diagram ............................................................................................................................................................... 41
Continuous Measurement Sequence (AC & DC Level Meter) .......................................................................................................... 42
Single Measurement Sequence (AC & DC Level Meter) .................................................................................................................. 42
Example for Resistance Measurement ............................................................................................................................................. 46
Differential Resistance Measurement ............................................................................................................................................... 46
Capacitance Measurement ............................................................................................................................................................... 47
External Voltage Measurement Principle .......................................................................................................................................... 48
MPI Read Operation Timing.............................................................................................................................................................. 50
MPI Write Operation Timing .............................................................................................................................................................. 50
PCM Clock Slope Select Waveform.................................................................................................................................................. 51
Compressed GCI Frame Structure.................................................................................................................................................... 53
Linear GCI Frame Structure .............................................................................................................................................................. 54
Monitor Channel Operation ............................................................................................................................................................... 56
State Diagram of the Monitor Transmitter ......................................................................................................................................... 57
State Diagram of the Monitor Receiver ............................................................................................................................................. 58
Waveform of Programming Example: Writing to Local Registers ..................................................................................................... 83
Waveform of Programming Example: Reading Local Registers ....................................................................................................... 83
RSLIC Mode Control Signaling ......................................................................................................................................................... 87
RSLIC Control Timing Diagram......................................................................................................................................................... 88
RSLIC Internal Test Circuit................................................................................................................................................................ 89
IO Debounce Filter ............................................................................................................................................................................ 90
AC/DC Signal Path and Test Loopbacks .......................................................................................................................................... 92
Clock Timing...................................................................................................................................................................................... 99
MPI Input Timing ............................................................................................................................................................................. 100
MPI Output Timing .......................................................................................................................................................................... 100
PCM Interface Timing (Single Clock Mode) .................................................................................................................................... 101
PCM Interface Timing (Double Clock Mode)................................................................................................................................... 102
GCI Interface Timing ....................................................................................................................................................................... 103
Application Circuit for the Internal Ringing Mode ............................................................................................................................ 104
Application Circuit for the External Ringing Mode ........................................................................................................................... 105
LIST OF FIGURES
7
IDT82V1671/IDT82V1671A, IDT82V1074