LMP90100MHE National Semiconductor, LMP90100MHE Datasheet - Page 32

• Manufacturer Part Number: LMP90100MHE
• Description: AFE, SENSOR, 28TSSOP
• Manufacturer: National Semiconductor

Specifications of LMP90100MHE

• Brief Features: 24bit Low Power Sigma Delta ADC, Automatic Channel Sequencer
• Supply Voltage Range: 2.7V To 5.5V
• Operating Temperature Range: -40°C To +105°C
• Digital Ic Case Style: TSSOP
• No. Of Pins: 28
• Base: RoHS Compliant
• Ic Function: Multi-Channel, Low Power 24-bit Sensor AFE
• Rohs Compliant: Yes

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16.5.4 SPI Protocol
An SPI transaction begins when the master asserts CSB and
ends when the master deasserts CSB. Each transaction must
be separated by a CSB deassertion. Once CSB is asserted,
it must not pulse (deassert and assert again) during a (de-
sired) transaction.
A transaction contains variable number of bytes. Bits in each
byte are arranged MSB first.
If ADC_DOUT is not completely read out
read out at all, but a new ADC_DOUT is available, then
DRDYB can also be access via registers using the
DT_AVAIL_B bit. This bit indicates when fresh conversion
data is available in the ADC_DOUT registers. If new conver-
sion data is available, then DT_AVAIL_B = 0; otherwise,
DT_AVAIL_B = 1.
FIGURE 19. DRDYB Behavior for an Incomplete ADC_DOUT Reading
FIGURE 18. DRDYB Behavior for a Complete ADC_DOUT Reading
(Figure
19) or is not
32
16.5.5 DRDYB - Data Ready Bar
DRDYB is a signal generated by the LMP90100 that fresh
conversion data is available in the ADC_DOUT registers.
DRDYB is automatically asserted every (1/ODR) second. For
a complete reading, DRDYB deasserts whenever the LSB of
ADC_DOUTL is read out
DRDYB will automatically pulse for t
for t
Opposed to the drdyb signal, a complete reading for
DT_AVAIL_B occurs when the MSB of ADC_DOUTH is read
out. This bit cannot be reset even if REG_AND_CNV_RST =
0xC3.
DRDYB
can be found in
(Figure
Section 13.0 Timing
18).
DRDYB
30139585
second. The value
30139584
Diagrams.