LMP90100MHE National Semiconductor, LMP90100MHE Datasheet - Page 36

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LMP90100MHE

Manufacturer Part Number
LMP90100MHE
Description
AFE, SENSOR, 28TSSOP
Manufacturer
National Semiconductor
Datasheet

Specifications of LMP90100MHE

Brief Features
24bit Low Power Sigma Delta ADC, Automatic Channel Sequencer
Supply Voltage Range
2.7V To 5.5V
Operating Temperature Range
-40°C To +105°C
Digital Ic Case Style
TSSOP
No. Of Pins
28
Base
RoHS Compliant
Ic Function
Multi-Channel, Low Power 24-bit Sensor AFE
Rohs Compliant
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LMP90100MHE/NOPB
Manufacturer:
TI
Quantity:
3 000
www.national.com
16.6 POWER MANAGEMENT
The device can be placed in Active, Power-Down, or Stand-
By state.
In Power-Down, the ADC is not converting data, contents of
the registers are unaffected, and there is a drastic power re-
duction. In Stand-By, the ADC is not converting data, but the
power is only slightly reduced so that the device can quickly
transition into the active state if desired.
These states can be selected using the PWRCN register.
When written, PWRCN brings the device into the Active, Pow-
er-Down, or Stand-By state. When read, PWRCN indicates
the state of the device.
The read value would confirm the write value after a small
latency (approximately 15 µs with the internal CLK). It may be
appropriate to wait for this latency to confirm the state change.
Requests not adhering to this latency requirement may be
rejected.
It is not possible to make a direct transition from the power-
down state to the stand-by state. This state diagram is shown
below.
FIGURE 25. Active, Power-Down, Stand-by State Diagram
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36
16.7 RESET and RESTART
Writing 0xC3 to the REG_AND_CNV_RST field will reset the
conversion and most of the programmable registers to their
default values. The only registers that will not be reset are the
System
CHx_SCAL_GAIN) and the DT_AVAIL_B bit.
If it is desirable to reset the System Calibration Coefficient
Registers, then set RESET_SYSCAL = 1 before writing 0xC3
to REG_AND_CNV_RST. If the device is operating in the
“System Calibration Offset/Gain Coefficient Determination”
mode (SCALCN register), then write REG_AND_CNV_RST
= 0xC3 twice to get out of this mode.
After a register reset, any on-going conversions will be abort-
ed and restarted. If the device is in the power-down state, then
a register reset will bring it out of the power-down state.
To restart a conversion, write 1 to the RESTART bit. This bit
can be used to synchronize the conversion to an external
event.
Calibration
Registers
(CHx_SCAL_OFFSET,

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