LMP90100MHE National Semiconductor, LMP90100MHE Datasheet - Page 46

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LMP90100MHE

Manufacturer Part Number
LMP90100MHE
Description
AFE, SENSOR, 28TSSOP
Manufacturer
National Semiconductor
Datasheet

Specifications of LMP90100MHE

Brief Features
24bit Low Power Sigma Delta ADC, Automatic Channel Sequencer
Supply Voltage Range
2.7V To 5.5V
Operating Temperature Range
-40°C To +105°C
Digital Ic Case Style
TSSOP
No. Of Pins
28
Base
RoHS Compliant
Ic Function
Multi-Channel, Low Power 24-bit Sensor AFE
Rohs Compliant
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LMP90100MHE/NOPB
Manufacturer:
TI
Quantity:
3 000
www.national.com
18.0 Registers
1.
2.
3.
RESETCN
SPI_HANDSHAKECN
Reserved
SPI_STREAMCN
Reserved
PWRCN
DATA_ONLY_1
DATA_ONLY_2
ADC_RESTART
Reserved
GPIO_DIRCN
GPIO_DAT
BGCALCN
SPI_DRDYBCN
ADC_AUXCN
SPI_CRC_CN
SENDIAG_THLD
Reserved
SCALCN
ADC_DONE
SENDIAG_FLAGS
ADC_DOUT
SPI_CRC_DAT
CHANNEL CONFIGURATION REGISTERS
CH_STS
CH_SCAN
CH0_INPUTCN
CH0_CONFIG
CH1_INPUTCN
CH1_CONFIG
CH2_INPUTCN
CH2_CONFIG
CH3_INPUTCN
CH3_CONFIG
CH4_INPUTCN
CH4_CONFIG
CH5_INPUTCN
CH5_CONFIG
CH6_INPUTCN
If written to, RESERVED bits must be written to only 0
unless otherwise indicated.
Read back value of RESERVED bits and registers is
unspecified and should be discarded.
Recommended values must be programmed and
forbidden values must not be programmed where they
are indicated in order to avoid unexpected results.
Reset Control
SPI Handshake Control
-
SPI Stream Control
-
Power Mode Control and Status
Data Only Read Control 1
Data Only Read Control 2
ADC Restart Conversion
-
GPIO Direction Control
GPIO Data
Background Calibration Control
SPI Data Ready Bar Control
ADC Auxiliary Control
CRC Control
Sensor Diagnostic Threshold 1,0
-
System Calibration Control
ADC Data Available
Sensor Diagnostic Flags
Conversion Data 2,1,0
CRC Data
Channel Status
Channel Scan Mode
CH0 Input Control
CH0 Configuration
CH1 Input Control
CH1 Configuration
CH2 Input Control
CH2 Configuration
CH3 Input Control
CH3 Configuration
CH4 Input Control
CH4 Configuration
CH5 Input Control
CH5 Configuration
CH6 Input Control
Register Name
46
4.
18.1 Register Map
If written to, registers indicated as Reserved must have
the indicated default value as shown below. Any other
value can cause unexpected results.
(URA & LRA)
0x0C - 0x0D
0x1A - 0x1C
0x04 - 0x07
0x14 - 0x15
ADDR
0x1D
0X22
0x2C
0x00
0x01
0x02
0x03
0x08
0x09
0x0A
0x0B
0x0E
0x0F
0x10
0x11
0x12
0x13
0x16
0x17
0x18
0x19
0x1E
0x1F
0x20
0x21
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
Type
RO &
RO &
RO &
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
WO
WO
WO
WO
WO
RO
RO
RO
RO
-
-
-
-
Default
0x0000
0x1A
0x00
0x00
0x00
0x00
0x00
0x02
0x00
0x00
0x00
0x03
0x00
0x02
0x00
0x00
0x00
0x30
0x01
0x70
0x13
0x70
0x25
0x70
0x37
0x70
0x01
0x70
0x13
0x70
0x25
-
-
-
-
-
-
-

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