PIC16LF1906-E/MV Microchip Technology, PIC16LF1906-E/MV Datasheet - Page 139
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PIC16LF1906-E/MV
Manufacturer Part Number
PIC16LF1906-E/MV
Description
14KB Flash, 512B RAM, LCD, 11x10b ADC, EUSART, NanoWatt XLP 28 UQFN 4x4x0.5mm TU
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1904-EMV.pdf
(288 pages)
Specifications of PIC16LF1906-E/MV
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
LIN, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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16.0
The Timer0 module is an 8-bit timer/counter with the
following features:
• 8-bit timer/counter register (TMR0)
• 8-bit prescaler (independent of Watchdog Timer)
• Programmable internal or external clock source
• Programmable external clock edge selection
• Interrupt on overflow
• TMR0 can be used to gate Timer1
Figure 16-1
16.1
The Timer0 module can be used as either an 8-bit timer
or an 8-bit counter.
16.1.1
The Timer0 module will increment every instruction
cycle, if used without a prescaler. 8-Bit Timer mode is
selected by clearing the TMR0CS bit of the
OPTION_REG register.
When TMR0 is written, the increment is inhibited for
two instruction cycles immediately following the write.
FIGURE 16-1:
2011 Microchip Technology Inc.
Note:
F
T0CKI
OSC
TIMER0 MODULE
Timer0 Operation
/4
8-BIT TIMER MODE
The value written to the TMR0 register
can be adjusted, in order to account for
the two instruction cycle delay when
TMR0 is written.
is a block diagram of the Timer0 module.
TMR0SE
BLOCK DIAGRAM OF THE TIMER0
TMR0CS
0
1
Preliminary
Prescaler
8-bit
8
PS<2:0>
16.1.2
In 8-Bit Counter mode, the Timer0 module will increment
on every rising or falling edge of the T0CKI pin.
8-Bit Counter mode using the T0CKI pin is selected by
setting the TMR0CS bit in the OPTION_REG register to
‘1’ .
The rising or falling transition of the incrementing edge
is determined by the TMR0SE bit in the OPTION_REG
register.
PIC16LF1904/6/7
8-BIT COUNTER MODE
PSA
1
0
2 T
Sync
CY
Set Flag bit TMR0IF
DS41569A-page 139
Overflow to Timer1
on Overflow
Data Bus
8
TMR0
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