PIC16LF1906-E/MV Microchip Technology, PIC16LF1906-E/MV Datasheet - Page 55

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PIC16LF1906-E/MV

Manufacturer Part Number
PIC16LF1906-E/MV
Description
14KB Flash, 512B RAM, LCD, 11x10b ADC, EUSART, NanoWatt XLP 28 UQFN 4x4x0.5mm TU
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16LF1906-E/MV

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
LIN, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
5.12
The Power Control (PCON) register contains flag bits
to differentiate between a:
• Power-on Reset (POR)
• Brown-out Reset (BOR)
• Reset Instruction Reset (RI)
• MCLR Reset (RMCLR)
• Watchdog Timer Reset (RWDT)
• Stack Underflow Reset (STKUNF)
• Stack Overflow Reset (STKOVF)
REGISTER 5-2:
 2011 Microchip Technology Inc.
bit 7
Legend:
HC = Bit is cleared by hardware
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W/HS-0/q
STKOVF
Power Control (PCON) Register
STKOVF: Stack Overflow Flag bit
1 = A Stack Overflow occurred
0 = A Stack Overflow has not occurred or set to ‘0’ by firmware
STKUNF: Stack Underflow Flag bit
1 = A Stack Underflow occurred
0 = A Stack Underflow has not occurred or set to ‘0’ by firmware
Unimplemented: Read as ‘0’
RWDT: Watchdog Timer Reset Flag bit
1 = A Watchdog Timer Reset has not occurred or set to ‘1’ by firmware
0 = A Watchdog Timer Reset has occurred (set to ‘0’ in hardware when a Watchdog Timer Reset)
RMCLR: MCLR Reset Flag bit
1 = A MCLR Reset has not occurred or set to ‘1’ by firmware
0 = A MCLR Reset has occurred (set to ‘0’ in hardware when a MCLR Reset occurs)
RI: RESET Instruction Flag bit
1 = A RESET instruction has not been executed or set to ‘1’ by firmware
0 = A RESET instruction has been executed (set to ‘0’ in hardware upon executing a RESET instruction)
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set in software after a Power-on Reset or Brown-out Reset
R/W/HS-0/q
STKUNF
occurs)
PCON: POWER CONTROL REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U-0
R/W/HC-1/q R/W/HC-1/q
RWDT
Preliminary
U = Unimplemented bit, read as ‘0’
-m/n = Value at POR and BOR/Value at all other Resets
q = Value depends on condition
HS = Bit is set by hardware
RMCLR
The PCON register bits are shown in
PIC16LF1904/6/7
R/W/HC-1/q
RI
R/W/HC-q/u
POR
DS41569A-page 55
Register
R/W/HC-q/u
BOR
5-2.
bit 0

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