PIC18LF27J13T-I/SO Microchip Technology, PIC18LF27J13T-I/SO Datasheet - Page 131

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PIC18LF27J13T-I/SO

Manufacturer Part Number
PIC18LF27J13T-I/SO
Description
28-pin, GP, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC 28 SOIC .300in T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18LF27J13T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.75 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REGISTER 9-11:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SSP2IE
R/W-0
SSP2IE: Master Synchronous Serial Port 2 Interrupt Enable bit
1 = Enabled
0 = Disabled
BCL2IE: Bus Collision Interrupt Enable bit (MSSP2 module)
1 = Enabled
0 = Disabled
RC2IE: EUSART2 Receive Interrupt Enable bit
1 = Enabled
0 = Disabled
TX2IE: EUSART2 Transmit Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR4IE: TMR4 to PR4 Match Interrupt Enable bit
1 = Enabled
0 = Disabled
CTMUIE: Charge Time Measurement Unit (CTMU) Interrupt Enable bit
1 = Enabled
0 = Disabled
TMR3GIE: Timer3 Gate Interrupt Enable bit
1 = Enabled
0 = Disabled
RTCCIE: RTCC Interrupt Enable bit
1 = Enabled
0 = Disabled
BCL2IE
R/W-0
PIE3: PERIPHERAL INTERRUPT ENABLE REGISTER 3 (ACCESS FA3h)
W = Writable bit
‘1’ = Bit is set
RC2IE
R/W-0
R/W-0
TX2IE
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F47J13 FAMILY
TMR4IE
R/W-0
CTMUIE
R/W-0
x = Bit is unknown
TMR3GIE
R/W-0
DS39974A-page 131
RTCCIE
R/W-0
bit 0

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