PIC18LF27J13T-I/SO Microchip Technology, PIC18LF27J13T-I/SO Datasheet - Page 396

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PIC18LF27J13T-I/SO

Manufacturer Part Number
PIC18LF27J13T-I/SO
Description
28-pin, GP, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC 28 SOIC .300in T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets

Specifications of PIC18LF27J13T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 2.75 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F47J13 FAMILY
25.6
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
TABLE 25-1:
DS39974A-page 396
HLVDCON
INTCON
PIR2
PIE2
IPR2
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the HLVD module.
Name
Operation During Sleep
VDIRMAG
GIE/GIEH
OSCFIE
OSCFIP
OSCFIF
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
Bit 7
PEIE/GIEL
BGVST
CM2IE
CM2IP
CM2IF
Bit 6
TMR0IE
CM1IE
CM1IP
CM1IF
IRVST
Bit 5
Preliminary
HLVDEN
INT0IE
Bit 4
25.7
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
HLVDL3
BCL1IF
BCL1IE
BCL1IP
RBIE
Bit 3
Effects of a Reset
HLVDL2
TMR0IF
HLVDIF
HLVDIE
HLVDIP
Bit 2
 2010 Microchip Technology Inc.
HLVDL1
TMR3IE
TMR3IP
TMR3IF
INT0IF
Bit 1
HLVDL0
CCP2IE
CCP2IP
CCP2IF
RBIF
Bit 0

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