PIC32MX210F016B-I/SO Microchip Technology, PIC32MX210F016B-I/SO Datasheet - Page 207

• Manufacturer Part Number: PIC32MX210F016B-I/SO
• Description: PIC32, 16KB Flash, 4KB RAM, 40 MHz, USB, CTMU, 4 DMA 28 SOIC .300in TUBE
• Manufacturer: Microchip Technology

REGISTER 21-2:
© 2011-2012 Microchip Technology Inc.
Legend:
R = Readable bit
-n = Value at POR
bit 31-16 Unimplemented: Read as ‘0’
bit 15-13 VCFG<2:0>: Voltage Reference Configuration bits
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5-2
bit 1
bit 0
Range
31:24
23:16
15:8
Bit
7:0
OFFCAL: Input Offset Calibration Mode Select bit
1 = Enable Offset Calibration mode
0 = Disable Offset Calibration mode
Unimplemented: Read as ‘0’
CSCNA: Input Scan Select bit
1 = Scan inputs
0 = Do not scan inputs
Unimplemented: Read as ‘0’
BUFS: Buffer Fill Status bit
Only valid when BUFM = 1.
1 = ADC is currently filling buffer 0x8-0xF, user should access data in 0x0-0x7
0 = ADC is currently filling buffer 0x0-0x7, user should access data in 0x8-0xF
Unimplemented: Read as ‘0’
SMPI<3:0>: Sample/Convert Sequences Per Interrupt Selection bits
1111 = Interrupts at the completion of conversion for each 16
1110 = Interrupts at the completion of conversion for each 15
•
•
•
0001 = Interrupts at the completion of conversion for each 2
0000 = Interrupts at the completion of conversion for each sample/convert sequence
BUFM: ADC Result Buffer Mode Select bit
1 = Buffer configured as two 8-word buffers, ADC1BUF7-ADC1BUF0, ADC1BUFF-ADCBUF8
0 = Buffer configured as one 16-word buffer ADC1BUFF-ADC1BUF0
ALTS: Alternate Input Sample Mode Select bit
1 = Uses Sample A input multiplexer settings for first sample, then alternates between Sample B and
0 = Always use Sample A input multiplexer settings
31/23/15/7
BUFS
R/W-0
000
001
010
011
1xx
Positive and negative inputs of the sample and hold amplifier are connected to V
The inputs to the sample and hold amplifier are controlled by AD1CHS or AD1CSSL
Sample A input multiplexer settings for all subsequent samples
Bit
U-0
U-0
R-0
—
—
AD1CON2: ADC CONTROL REGISTER 2
VCFG<2:0>
30/22/14/6
External V
External V
R/W-0
Bit
U-0
U-0
U-0
—
—
—
V
AV
AV
AV
REFH
DD
DD
DD
REF
REF
W = Writable bit
‘1’ = Bit is set
29/21/13/5
R/W-0
R/W-0
+ pin
+ pin
Bit
U-0
U-0
—
—
Preliminary
28/20/12/4
OFFCAL
External V
External V
R/W-0
R/W-0
Bit
U-0
U-0
—
—
SMPI<3:0>
V
AVss
AV
AV
REFL
SS
SS
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
REF
REF
27/19/11/3
R/W-0
- pin
- pin
Bit
U-0
U-0
U-0
—
—
—
nd
th
th
sample/convert sequence
sample/convert sequence
sample/convert sequence
PIC32MX1XX/2XX
26/18/10/2
CSCNA
R/W-0
R/W-0
Bit
U-0
U-0
—
—
x = Bit is unknown
25/17/9/1
BUFM
REFL
R/W-0
Bit
U-0
U-0
U-0
—
—
—
DS61168D-page 207
24/16/8/0
ALTS
R/W-0
Bit
U-0
U-0
U-0
—
—
—