PIC32MX210F016B-I/SO Microchip Technology, PIC32MX210F016B-I/SO Datasheet - Page 51
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PIC32MX210F016B-I/SO
Manufacturer Part Number
PIC32MX210F016B-I/SO
Description
PIC32, 16KB Flash, 4KB RAM, 40 MHz, USB, CTMU, 4 DMA 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Datasheet
1.PIC32MX210F016B-ISO.pdf
(320 pages)
- Current page: 51 of 320
- Download datasheet (7Mb)
TABLE 4-9:
Legend:
Note 1:
9000 AD1CON1
9010 AD1CON2
9020 AD1CON3
9040 AD1CHS
9050 AD1CSSL
9070 ADC1BUF0
9080 ADC1BUF1
9090 ADC1BUF2
90A0 ADC1BUF3
90B0 ADC1BUF4
90C0 ADC1BUF5
90D0 ADC1BUF6
90E0 ADC1BUF7
90F0 ADC1BUF8
9100 ADC1BUF9
9110 ADC1BUFA
9120 ADC1BUFB
9130 ADC1BUFC
9140 ADC1BUFD
Register
Name
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
details.
(1)
(1)
(1)
(1)
(1)
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
ADC REGISTER MAP
CSSL15
CH0NB
ADRC
31/15
ON
—
—
—
—
—
VCFG<2:0>
CSSL14
30/14
—
—
—
—
—
—
—
—
CSSL13
29/13
SIDL
—
—
—
—
—
—
—
OFFCAL
CSSL12
28/12
—
—
—
—
—
—
—
CSSL11
27/11
—
—
—
—
—
—
—
SAMC<4:0>
CSSL10
CSCNA
26/10
—
—
—
CH0SB<3:0>
—
—
FORM<2:0>
CSSL9
ADC Result Word A (ADC1BUFA<31:0>)
ADC Result Word B (ADC1BUFB<31:0>)
ADC Result Word C (ADC1BUFC<31:0>)
ADC Result Word D (ADC1BUFD<31:0>)
ADC Result Word 0 (ADC1BUF0<31:0>)
ADC Result Word 1 (ADC1BUF1<31:0>)
ADC Result Word 2 (ADC1BUF2<31:0>)
ADC Result Word 3 (ADC1BUF3<31:0>)
ADC Result Word 4 (ADC1BUF4<31:0>)
ADC Result Word 5 (ADC1BUF5<31:0>)
ADC Result Word 6 (ADC1BUF6<31:0>)
ADC Result Word 7 (ADC1BUF7<31:0>)
ADC Result Word 8 (ADC1BUF8<31:0>)
ADC Result Word 9 (ADC1BUF9<31:0>)
25/9
—
—
—
—
—
—
CSSL8
24/8
—
—
—
—
—
—
Bits
CH0NA
CSSL7
BUFS
23/7
—
—
—
—
—
SSRC<2:0>
CSSL6
22/6
—
—
—
—
—
—
—
CSSL5
21/5
—
—
—
—
—
—
CLRASAM
CSSL4
20/4
—
—
—
—
—
—
ADCS<7:0>
SMPI<3:0>
CSSL3
Section 11.2 “CLR, SET and INV Registers”
19/3
—
—
—
—
—
—
CSSL2
ASAM
18/2
—
—
—
—
—
CH0SA<3:0>
CSSL1
SAMP
BUFM
17/1
—
—
—
—
—
CSSL0
DONE
ALTS
16/0
—
—
—
—
—
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
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