SAF7118EHV1 NXP Semiconductors, SAF7118EHV1 Datasheet - Page 11

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SAF7118EHV1

Manufacturer Part Number
SAF7118EHV1
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SAF7118EHV1

Screening Level
Industrial
Package Type
HBGA
Pin Count
156
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
Table 4.
SAF7118_4
Product data sheet
Symbol
DNC7
DNC8
DNC11
DNC12
DNC21
DNC22
DNC3
DNC4
DNC5
XTRI
XPD7
XPD6
V
XPD5
XPD4
V
V
XPD3
XPD2
V
V
XPD1
XPD0
XRV
XRH
V
XCLK
XDQ
V
XRDY
TRST
TCK
TMS
TDO
V
SSD9
DDD10
SSD10
DDD11
SSD11
DDD12
SSD12
DDD13
Pin description
Pin
QFP160
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
HBGA156
B13
B14
C12
C13
-
-
A13
B12
A12
B11
C11
A11
D11
B10
A10
C10
D10
B9
A9
C9
D9
B8
A8
D8
C7
C8
A7
B7
D7
A6
C6
B6
D6
A5
C5
…continued
Type
NC
NC
NC
NC
NC
NC
I/pu
O
I/pu
I
I/O
I/O
P
I/O
I/O
P
P
I/O
I/O
P
P
I/O
I/O
I/O
I/O
P
I/O
I/O
P
O
I/pu
I/pu
I/pu
O
P
[1]
Rev. 04 — 4 July 2008
Description
do not connect, reserved for future extensions and for testing
do not connect, reserved for future extensions and for testing
do not connect, reserved for future extensions and for testing
do not connect, reserved for future extensions and for testing
do not connect, reserved for future extensions and for testing
do not connect, reserved for future extensions and for testing
do not connect, reserved for future extensions and for testing: scan
input
do not connect, reserved for future extensions and for testing: scan
output
do not connect, reserved for future extensions and for testing: scan
input
X port output control signal, affects all X port pins (XPD7 to XPD0,
XRH, XRV, XDQ and XCLK), enable and active polarity is under
software control (bits XPE in subaddress 83h)
MSB of expansion port data
MSB
digital ground 9 (peripheral cells)
MSB
MSB
digital supply voltage 10 (core)
digital ground 10 (core)
MSB
MSB
digital supply voltage 11 (peripheral cells)
digital ground 11 (peripheral cells)
MSB
LSB of expansion port data
vertical reference I/O expansion port
horizontal reference I/O expansion port
digital supply voltage 12 (core)
clock I/O expansion port
data qualifier for expansion port
digital ground 12 (core)
task flag or ready signal from scaler, controlled by XRQT
test reset input (active LOW), for boundary scan test (with internal
pull-up)
test clock for boundary scan test
test mode select input for boundary scan test or scan test
test data output for boundary scan test
digital supply voltage 13 (peripheral cells)
Multistandard video decoder with adaptive comb filter
1 of expansion port data
2 of expansion port data
3 of expansion port data
4 of expansion port data
5 of expansion port data
6 of expansion port data
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[5]
[5]
SAF7118
© NXP B.V. 2008. All rights reserved.
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