MT47H32M16HR-37E:F Micron Technology Inc, MT47H32M16HR-37E:F Datasheet - Page 113
![](/photos/31/34/313419/mfg557-84-fbga_sml.jpg)
MT47H32M16HR-37E:F
Manufacturer Part Number
MT47H32M16HR-37E:F
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H32M16HR-37EF.pdf
(132 pages)
Specifications of MT47H32M16HR-37E:F
Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
500ps
Maximum Clock Rate
533MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
205mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H32M16HR-37E:F
Manufacturer:
MICRON
Quantity:
5 373
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REFRESH
Figure 66: Refresh Mode
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. R 12/10 EN
DQS, DQS# 4
Command
Address
Bank
DM 4
DQ 4
CK#
CKE
A10
CK
NOP 1
T0
Notes:
One bank
All banks
Bank(s)
PRE
T1
The commercial temperature DDR2 SDRAM requires REFRESH cycles at an average in-
terval of 7.8125µs (MAX) and all rows in all banks must be refreshed at least once every
64ms. The refresh period begins when the REFRESH command is registered and ends
t
ceeds +85°C.
RFC (MIN) later. The average interval must be reduced to 3.9µs (MAX) when T
3
1. NOP commands are shown for ease of illustration; other valid commands may be possi-
2. The second REFRESH is not required and is only shown as an example of two back-to-
3. “Don’t Care” if A10 is HIGH at this point; A10 must be HIGH if more than one bank is
4. DM, DQ, and DQS signals are all “Don’t Care”/High-Z for operations shown.
t CK
ble at these times. CKE must be active during clock positive transitions.
back REFRESH commands.
active (must precharge all active banks).
NOP 1
T2
t CH
t RP
t CL
NOP 1
T3
113
REF
T4
t RFC (MIN)
NOP 1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Ta0
512Mb: x4, x8, x16 DDR2 SDRAM
REF 2
Ta1
Indicates a break in
time scale
NOP 1
Tb0
© 2004 Micron Technology, Inc. All rights reserved.
t RFC 2
NOP 1
Tb1
Don’t Care
REFRESH
C
ex-
Tb2
ACT
RA
RA
BA
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