ISP1181ADGG STEricsson, ISP1181ADGG Datasheet - Page 7
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ISP1181ADGG
Manufacturer Part Number
ISP1181ADGG
Description
Manufacturer
STEricsson
Datasheet
1.ISP1181ADGG.pdf
(71 pages)
Specifications of ISP1181ADGG
Lead Free Status / RoHS Status
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Philips Semiconductors
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Product data
Table 2:
Symbol
EOT
DREQ
DACK
TEST1
TEST2
INT
TEST3
BUS_CONF0
BUS_CONF1
DATA15
DATA14
DATA13
DATA12
DATA11
DATA10
GND
V
DATA9
DATA8
DATA7
DATA6
ref
[1]
Pin description
Pin
TSSOP48
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Rev. 05 — 08 December 2004
…continued
HVQFN48
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Type
I
O
I
I
I
O
O
I
I
I/O
I/O
I/O
I/O
I/O
I/O
-
-
I/O
I/O
I/O
I/O
Description
End-Of-Transfer input (programmable
polarity, see
controller to force the end of a DMA transfer
to the ISP1181A
DMA request output (4 mA; programmable
polarity, see
controller that the ISP1181A wants to start
a DMA transfer
DMA acknowledge input (programmable
polarity, see
controller to signal the start of a DMA
transfer requested by the ISP1181A
test input; this pin must be connected to
V
test input; this pin must be connected to
V
interrupt output; programmable polarity
(active HIGH or LOW) and signalling (level
or pulse); see
test output; this pin is used for test
purposes only
bus configuration selector; see
bus configuration selector; see
bit 15 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 14 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 13 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 12 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 11 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 10 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
ground supply
I/O pin reference voltage (3.3 V); no
connection if V
bit 9 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 8 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 7 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
bit 6 of D[15:0]; bidirectional data line
(slew-rate controlled output, 4 mA)
Full-speed USB peripheral controller
CC
CC
via an external 10 k resistor
via an external 10 k resistor
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table
Table
Table
Table 21
CC
= 5.0 V
21); used by the DMA
21); signals to the DMA
21); used by the DMA
ISP1181A
Table 3
Table 3
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