MC9S08SH16CTL Freescale, MC9S08SH16CTL Datasheet - Page 29

• Manufacturer Part Number: MC9S08SH16CTL
• Manufacturer: Freescale

Specifications of MC9S08SH16CTL

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 23
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 16KB
• Lead Free Status / RoHS Status: Compliant

Freescale Semiconductor
1
2
3
4
5
6
28-pin 20-pin 16-pin
Pin does not contain a clamp diode to V
the internally pulled up RESET in will not be pulled to V
pulled to V
IIC pins can be repositioned using IICPS in SOPT2, default reset locations are PTA2, PTA3.
TPM1CHx pins can be repositioned using T1CHxPS bits in SOPT2, default reset locations are PTA0, PTB5.
This port pin is part of the ganged output feature. When pin is enabled for ganged output, it will have priority
over all digital modules. The output data, drive strength and slew-rate control of this port pin will follow the
configuration for the PTC0 pin, even in 16-pin packages where PTC0 doesn’t bond out.
TPM2CHx pins can be repositioned using T2CHxPS bits in SOPT2, default reset locations are PTA1, PTB4.
If ACMP and ADC are both enabled, both will have access to the pin.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
Pin Number
10
11
12
13
14
15
16
17
18
19
20
—
—
—
—
—
—
1
2
3
4
5
6
7
8
9
DD
.
—
—
—
—
—
—
10
11
12
—
—
13
14
15
16
—
—
1
2
3
4
5
6
7
8
9
Table 2-1. Pin Availability by Package Pin-Count
PTC5
PTC4
PTA5
PTA4
PTB7
PTB6
PTB5
PTB4
PTC3
PTC2
PTC1
PTC0
PTB3
PTB2
PTB1
PTB0
PTA7
PTA6
PTA3
PTA2
PTA1
PTA0
PTC7
PTC6
Port Pin
MC9S08SH32 Series Data Sheet, Rev. 2
Lowest
IRQ
ACMPO
SCL
SDA
TPM1CH1
TPM2CH1
TPM1CH1
TPM1CH0
PIB3
PIB2
PIB1
PIB0
TPM2CH1
TPM2CH0
PIA3
PIA2
PIA1
PIA0
DD
PRELIMINARY
Alt 1
2
and should not be driven above V
2
3
5
3
3
5
5
TCLK
EXTAL
XTAL
SS
MISO
MOSI
SPSCK
TxD
RxD
SCL
SDA
TPM2CH0
TPM1CH0
DD
Alt 2
2
2
. The internal gates connected to this pin are
Priority
5
3
PTC0
PTC0
PTC0
PTC0
PTC0
PTC0
PTC0
PTC0
Alt 3
4
4
4
4
4
4
4
4
DD
. The voltage measured on
BKGD
V
V
ADP11
ADP10
ADP9
ADP8
ADP7
ADP6
ADP5
ADP4
ADP3
ADP2
ADP1
ADP0
DDA
SSA
Chapter 2 Pins and Connections
Alt 4
6
6
Highest
ADP13
ADP12
MS
V
V
V
V
ACMP-
ACMP+
ADP15
ADP14
DD
REFH
REFL
SS
RESET
Alt5
6
6
1
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