MC9S08SH16CTL Freescale, MC9S08SH16CTL Datasheet - Page 83

• Manufacturer Part Number: MC9S08SH16CTL
• Manufacturer: Freescale

Specifications of MC9S08SH16CTL

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 23
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 16-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Package Type: TSSOP
• Program Memory Type: Flash
• Program Memory Size: 16KB
• Lead Free Status / RoHS Status: Compliant

6.6.1.4
6.6.1.5
Freescale Semiconductor
Reserved
Reserved
Reset:
Reset:
[7:6, 4:0]
[7:6, 4:0]
7:6, 4:0
PTASE
PTADS
7:6,4:0
Field
Field
5
5
W
W
R
R
PTASE7
PTADS7
Output Slew Rate Enable for Port A Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTA pin. For port A pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port A bit n.
1 Output slew rate control enabled for port A bit n.
Reserved Bits — These bits are unused on this MCU, writes have no affect and could read as 1s or 0s.
Output Drive Strength Selection for Port A Bits — Each of these control bits selects between low and high
output drive for the associated PTA pin. For port A pins that are configured as inputs, these bits have no effect.
0 Low output drive strength selected for port A bit n.
1 High output drive strength selected for port A bit n.
Reserved Bits — These bits are unused on this MCU, writes have no affect and could read as 1s or 0s.
Port A Slew Rate Enable Register (PTASE)
0
Port A Drive Strength Selection Register (PTADS)
0
7
7
Figure 6-7. Drive Strength Selection for Port A Register (PTADS)
PTASE6
PTADS6
Figure 6-6. Slew Rate Enable for Port A Register (PTASE)
0
0
6
6
Table 6-5. PTASE Register Field Descriptions
Table 6-6. PTADS Register Field Descriptions
MC9S08SH32 Series Data Sheet, Rev. 2
R
R
0
0
5
5
PRELIMINARY
PTADS4
PTASE4
0
0
4
4
Description
Description
PTADS3
PTASE3
3
0
3
0
PTASE2
PTADS2
Chapter 6 Parallel Input/Output Control
0
0
2
2
PTASE1
PTADS1
0
0
1
1
PTASE0
PTADS0
0
0
0
0
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