MC68HC908QT2CPE Freescale, MC68HC908QT2CPE Datasheet - Page 104

• Manufacturer Part Number: MC68HC908QT2CPE
• Manufacturer: Freescale

Specifications of MC68HC908QT2CPE

• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 128Byte
• # I/os (max): 6
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 4-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Through Hole
• Pin Count: 8
• Package Type: PDIP
• Program Memory Type: Flash
• Program Memory Size: 1.5KB
• Lead Free Status / RoHS Status: Compliant

System Integration Module (SIM)
13.2 RST and IRQ Pins Initialization
RST and IRQ pins come out of reset as PTA3 and PTA2 respectively. RST and IRQ functions can be
activated by programing CONFIG2 accordingly. Refer to
13.3 SIM Bus Clock Control and Generation
The bus clock generator provides system clock signals for the CPU and peripherals on the MCU. The
system clocks are generated from an incoming clock, BUSCLKX2, as shown in
104
PIN LOGIC
RESET
INTERNAL
PULL-UP
V
DD
SIM RESET STATUS REGISTER
RESET PIN CONTROL
POR CONTROL
STOP/WAIT
CONTROL
CONTROL
AND PRIORITY DECODE
INTERRUPT CONTROL
CLOCK
MC68HC908QY/QT Family Data Sheet, Rev. 6
Figure 13-1. SIM Block Diagram
CLOCK GENERATORS
RESET
COUNTER
SIM
÷2
CONTROL
MASTER
RESET
Chapter 5 Configuration Register
LVI RESET (FROM LVI MODULE)
FORCED MON MODE ENTRY (FROM MENRST MODULE)
MODULE STOP
MODULE WAIT
CPU STOP (FROM CPU)
CPU WAIT (FROM CPU)
SIMOSCEN (TO OSCILLATOR)
COP CLOCK
BUSCLKX4 (FROM OSCILLATOR)
BUSCLKX2 (FROM OSCILLATOR)
INTERNAL CLOCKS
ILLEGAL OPCODE (FROM CPU)
ILLEGAL ADDRESS (FROM ADDRESS
MAP DECODERS)
COP TIMEOUT (FROM COP MODULE)
INTERRUPT SOURCES
CPU INTERFACE
Figure
Freescale Semiconductor
13-2.
(CONFIG).